EP9312-CBZ Cirrus Logic Inc, EP9312-CBZ Datasheet - Page 738

IC ARM9 SOC UNIVERSAL 352PBGA

EP9312-CBZ

Manufacturer Part Number
EP9312-CBZ
Description
IC ARM9 SOC UNIVERSAL 352PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9312-CBZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
352-BGA
Controller Family/series
(ARM9)
No. Of I/o's
16
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
No. Of Pwm Channels
2
Digital Ic Case Style
BGA
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1258

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9312-CBZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
24
24-6
Pulse Width Modulator
EP93xx User’s Guide
Default:
Definition:
Bit Descriptions:
pwmout
PWM_INV = 0
pwmout
PWM_INV = 1
clk_pwm
0x0000_0000
PWMx Invert
RSVD:
INV:
t
1
t
off
on
PULSE 1
Figure 24-1. PWM_INV Example
Copyright 2007 Cirrus Logic
2
Reserved. Unknown During Read.
Invert PWM output
0 = Output is not inverted. PWMOUT will output t
then t
1 = Output is inverted. PWMOUT will output t
t
PWM_INV is double buffered to allow it to be programmed
statically (PWM is stopped) or dynamically (PWM is
running).
Programmed statically, the invert takes affect after the
APB write completes and CLK_PWM is running. After the
update, CLK_PWM can be turned off without affecting
PWMOUT. In this way, the PWM output can be inverted
without enabling the PWM.
Programmed dynamically, PWM_INV is updated at the
end of a PWM cycle to prevent any output glitches or
errors. Read/write accesses to PWM_INV will read/write
its buffer.
Figure 24-1
PWM_INV invert bit.
ON
t
t
off
on
, PWMxDutyCycle controls t
3
OFF
Duty Cycle =
Duty Cycle =
, PWMxDutyCycle controls t
4
provides an example of the effect of the
PULSE 2
t
t
on
off
/(t
/(t
5
on
on
+t
+t
off
off
)
)
6
OFF
7
PULSE 3
.
ON
8
OFF
9
ON
DS785UM1
first then
first

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