EP9312-CBZ Cirrus Logic Inc, EP9312-CBZ Datasheet - Page 579

• Manufacturer Part Number: EP9312-CBZ
• Description: IC ARM9 SOC UNIVERSAL 352PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-CBZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 352-BGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 16
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Digital Ic Case Style: BGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1258

Register Descriptions
UART3Data
DS785UM1
16.3 Registers
31
15
Address:
Default:
Definition:
Bit Descriptions:
As another example, assume 230,400 baud (the maximum with a UARTCLK equal to
7.3728 Mhz), 5-bit characters, no parity, one stop bit, and no space between characters.
There are 7 bits per character, so 230,400 / 7 = 32,914 characters per second. Simultaneous
transmitting and receiving implies 65,829 APB characters per second. Using the DMA
interface would result in 16,457 AHB accesses per second, while using the APB to access
the UART leads to 65,829 bus accesses per second.
30
14
29
13
28
12
0x808E_0000 - Read/Write
0x0000_0000
UART3 Data Register
RSVD:
DATA:
RSVD
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Reserved. Unknown During Read.
UART Data, read for receive data, write for transmit data
For words to be transmitted:
• if the FIFOs are enabled, data written to this location is
pushed onto the transmit FIFO
• if the FIFOs are not enabled, data is stored in the
transmitter holding register (the bottom word of the
transmit FIFO). The write operation initiates transmission
from the UART. The data is prefixed with a start bit,
appended with the appropriate parity bit (if parity is
enabled), and a stop bit. The resultant word is then
transmitted.
For received words:
• if the FIFOs are enabled, the data byte is extracted, and
24
8
RSVD
23
7
22
6
21
5
20
4
DATA
UART3 With HDLC Encoder
19
3
EP93xx User’s Guide
18
2
17
1
16
16-3
0
16