R5F21324ANSP#U1 Renesas Electronics America, R5F21324ANSP#U1 Datasheet - Page 183

• Manufacturer Part Number: R5F21324ANSP#U1
• Description: MCU 1KB FLASH 16K ROM 20-LSSOP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/32Ar

Specifications of R5F21324ANSP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-LSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Under development
R8C/32A Group
REJ09B0458-0020 Rev.0.20
Page 153 of 583
13.2
13.2.1
Notes:
When shipping
Registers OFS and OFS2 are used to select the MCU state after a reset, the function to prevent rewriting in parallel
I/O mode, or the watchdog timer operation.
1. If the block including the OFS register is erased, the OFS register value is set to FFh.
2. The same level of the voltage detection 0 level selected by bits VDSEL0 and VDESL1 is set in both functions of
3. To use power-on reset and voltage monitor 0 reset, set the LVDAS bit to 0 (voltage monitor 0 reset enabled after
LVDAS Bit (Voltage Detection 0 Circuit Start Bit)
Bit
b0
b1
b2
b3
b4
b5
b6
b7
voltage monitor 0 reset and power-on reset.
reset).
The OFS register is allocated in the flash memory. Write to this register with a program.
After writing, do not write additions to this register.
The Vdet0 voltage to be monitored by the voltage detection 0 circuit is selected by bits VDSEL0 and VDSEL1.
Address 0FFFFh
Registers
Symbol CSPROINI LVDAS
CSPROINI Count source protection mode
ROMCP1 ROM code protect bit
WDTON Watchdog timer start select bit
ROMCR ROM code protect disable bit
VDSEL0 Voltage detection 0 level select bit
VDSEL1
Symbol
LVDAS
Option Function Select Register (OFS)
—
Bit
Preliminary specification
Specifications in this manual are tentative and subject to change.
Reserved bit
Voltage detection 0 circuit start bit
after reset select bit
b7
1
Nov 05, 2008
b6
1
Bit Name
VDSEL1 VDSEL0 ROMCP1 ROMCR
b5
1
b4
1
(3)
(2)
0: Watchdog timer automatically starts after reset.
1: Watchdog timer is stopped after reset.
Set to 1.
0: ROM code protect disabled
1: ROMCP1 bit enabled
0: ROM code protect enabled
1: ROM code protect disabled
b5 b4
0: Voltage monitor 0 reset enabled after reset
1: Voltage monitor 0 reset disabled after reset
0: Count source protect mode enabled after reset
1: Count source protect mode disabled after reset
0 0: 3.80 V selected (Vdet0_3)
0 1: 2.85 V selected (Vdet0_2)
1 0: 2.35 V selected (Vdet0_1)
1 1: 1.90 V selected (Vdet0_0)
b3
1
b2
1
Function
13. Option Function Select Area
b1
—
1
WDTON
b0
1
(Note 1)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W