R5F21324ANSP#U1 Renesas Electronics America, R5F21324ANSP#U1 Datasheet - Page 500

• Manufacturer Part Number: R5F21324ANSP#U1
• Description: MCU 1KB FLASH 16K ROM 20-LSSOP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/32Ar

Specifications of R5F21324ANSP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-LSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Under development
R8C/32A Group
REJ09B0458-0020 Rev.0.20
Page 470 of 583
28.2.5
Notes:
After Reset
1. The VW1C0 is enabled when the VCA26 bit in the VCA2 register is set to 1 (comparator A1 circuit enabled).
2. To use the comparator A1 interrupt to exit stop mode and to return again, write 0 and then 1 to the VW1C1 bit.
3. Bits VW1C2 and VW1C3 are enabled when the VCA26 bit in the VCA2 register is set to 1 (comparator A1 circuit
4. Set the VW1C2 bit to 0 by a program. When 0 is written by a program, this bit is set to 0 (and remains unchanged
5. The VW1C7 bit is enabled when the VCAC1 bit in the VCAC register is set to 0 (one edge). After setting the
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0039h
Symbol VW1C7
Set the VW1C0 bit to 0 (disabled) when the VCA26 bit is set to 0 (comparator A1 circuit disabled). To set the
VW1C0 bit to 1 (enabled), follow the procedure shown in Table 28.3 Procedure for Setting Bits Associated
with Comparator A1 Interrupt .
enabled).
even if 1 is written to it).
VCAC1 bit to 0, set the VW1C7 bit.
Set the PRC3 bit in the PRCR register to 1 (write enabled) before rewriting the VW1C register.
Rewriting the VW1C register may set the VW1C2 bit to 1. After rewriting this register, set the VW1C2 bit to 0.
Bit
VW1C0 Comparator A1 interrupt enable bit
VW1C1 Comparator A1 digital filter
VW1C2 Comparator A1 interrupt flag
VW1C3 Comparator A1 signal monitor flag
VW1C7 Comparator A1 interrupt
Symbol
VW1F0 Sampling clock select bit
VW1F1
Voltage Monitor 1 Circuit Control Register (VW1C)
—
Preliminary specification
Specifications in this manual are tentative and subject to change.
b7
1
disable mode select bit
Reserved bit
generation condition select bit
b6
—
0
Nov 05, 2008
Bit Name
VW1F1
b5
0
(2)
VW1F0
b4
(3, 4)
0
(5)
(3)
(1)
VW1C3
0: Disabled
1: Enabled
0: Digital filter enable mode
1: Digital filter disable mode
[Condition to set this bit to 0]
[Condition to set this bit to 1]
0: LVCMP1
1: LVCMP1
b5 b4
Set to 0.
0: When LVCMP1 reaches reference voltage
1: When LVCMP1 reaches reference voltage
0 is written.
When an interrupt request is generated.
0 0: fOCO-S divided by 1
0 1: fOCO-S divided by 2
1 0: fOCO-S divided by 4
1 1: fOCO-S divided by 8
b3
1
(digital filter circuit enabled)
(digital filter circuit disabled)
or comparator A1 circuit disabled
or above.
or below.
VW1C2
b2
<
≥
0
reference voltage
reference voltage
VW1C1
Function
b1
1
VW1C0
b0
0
28. Comparator A
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R