R5F21324ANSP#U1 Renesas Electronics America, R5F21324ANSP#U1 Datasheet - Page 229

MCU 1KB FLASH 16K ROM 20-LSSOP

R5F21324ANSP#U1

Manufacturer Part Number
R5F21324ANSP#U1
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Ar
Datasheet

Specifications of R5F21324ANSP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21324ANSP#U1
Manufacturer:
Renesas Electronics America
Quantity:
135
Under development
R8C/32A Group
REJ09B0458-0020 Rev.0.20
Page 199 of 583
17.6.1
Note:
1. When the same value from the TRAIO pin is sampled three times continuously, the input is determined.
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0101h
Symbol TIOGT1
TEDGSEL TRAIO polarity switch bit
TIOSEL
TOPCR
TOENA
TIOGT0
TIOGT1
Bit
Symbol
TIPF0
TIPF1
Timer RA I/O Control Register (TRAIOC) in Pulse Width Measurement
Mode
Preliminary specification
Specifications in this manual are tentative and subject to change.
b7
0
TRAIO output control bit
TRAO output enable bit
Hardware LIN function select bit
TRAIO input filter select bit
TRAIO event input control bit
TIOGT0
b6
0
Nov 05, 2008
Bit Name
TIPF1
b5
0
TIPF0
(1)
b4
0
TIOSEL
b3
Set to 0 in pulse width measurement mode.
0: TRAIO input starts at “L”
1: TRAIO input starts at “H”
Set to 0. However, set to 1 when the hardware
LIN function is used.
b5 b4
Set to 0 in pulse width measurement mode.
0
0 0: No filter
0 1: Filter with f1 sampling
1 0: Filter with f8 sampling
1 1: Filter with f32 sampling
TOENA
b2
0
TOPCR TEDGSEL
Function
b1
0
b0
0
17. Timer RA
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W

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