MC68HC16Z1CEH16 Freescale Semiconductor, MC68HC16Z1CEH16 Datasheet - Page 156

• Manufacturer Part Number: MC68HC16Z1CEH16
• Description: IC MCU 16BIT 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CEH16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Processor Series: HC16Z
• Core: CPU16
• Data Bus Width: 16 bit
• Controller Family/series: 68HC16
• No. Of I/o's: 26
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: QSPI, SCI
• Rohs Compliant: Yes
• Package: 132PQFP
• Family Name: HC16
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Number Of Programmable I/os: 16
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 11
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.7.3.1 Data Bus Mode Selection
5-50
DATA15
DATA8
DATA7
DATA0
All data lines have weak internal pull-up devices. When pins are held high by the in-
ternal pull-ups, the MCU uses a default operating configuration. However, specific
lines can be held low externally during reset to achieve an alternate configuration.
Use an active device to hold data bus lines low. Data bus configuration logic must re-
lease the bus before the first bus cycle after reset to prevent conflict with external
memory devices. The first bus cycle occurs ten CLKOUT cycles after RESET is re-
leased. If external mode selection logic causes a conflict of this type, an isolation re-
sistor on the driven lines may be required.
method for conditioning the mode select signals.
RESET
R/W
DS
Figure 5-18 Preferred Circuit for Data Bus Mode Select Conditioning
820
V
External bus loading can overcome the weak internal pull-up drivers
on data bus lines and hold pins low during reset.
DD
10 k
V
DD
Freescale Semiconductor, Inc.
For More Information On This Product,
10 k
V
SYSTEM INTEGRATION MODULE
DD
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OUT1
IN1
NOTE
HIGH OR LOW
AS NEEDED
TIE INPUTS
74HC244
Figure 5-18
OUT8
IN8
OE
shows a recommended
OUT1
IN1
HIGH OR LOW
AS NEEDED
TIE INPUTS
74HC244
M68HC16 Z SERIES
DATA BUS SELECT CONDITIONING
USER’S MANUAL
OUT8
IN8
OE