MC68HC16Z1CEH16 Freescale Semiconductor, MC68HC16Z1CEH16 Datasheet - Page 248

IC MCU 16BIT 16MHZ 132-PQFP

MC68HC16Z1CEH16

Manufacturer Part Number
MC68HC16Z1CEH16
Description
IC MCU 16BIT 16MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheets

Specifications of MC68HC16Z1CEH16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Processor Series
HC16Z
Core
CPU16
Data Bus Width
16 bit
Controller Family/series
68HC16
No. Of I/o's
26
Ram Memory Size
1KB
Cpu Speed
16MHz
No. Of Timers
2
Embedded Interface Type
QSPI, SCI
Rohs Compliant
Yes
Package
132PQFP
Family Name
HC16
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Number Of Programmable I/os
16
On-chip Adc
8-chx10-bit
Number Of Timers
11
Data Ram Size
1 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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10.3.3.2 Slave Mode
10.3.4 SPI Clock Phase and Polarity Controls
10-8
Data transfer is synchronized with the internally-generated serial clock (SCK). Control
bits CPHA and CPOL in SPCR control clock phase and polarity. Combinations of
CPHA and CPOL determine the SCK edge on which the master MCU drives outgoing
data from the MOSI pin and latches incoming data from the MISO pin.
Clearing the MSTR bit in SPCR selects slave mode operation. In slave mode, the SPI
is unable to initiate serial transfers. Transfers are initiated by an external bus master.
Slave mode is typically used on a multimaster SPI bus. Only one device can be bus
master (operate in master mode) at any given time.
When using the SPI in slave mode, include the following steps:
When SPE is set and MSTR is clear, a low state on the SS pin initiates slave mode
operation. The SS pin is used only as an input.
After a byte or word of data is transmitted, the SPI sets the SPIF flag. If the SPIE bit in
SPCR is set, an interrupt request is generated when SPIF is asserted.
Transfer is synchronized with the externally generated SCK. The CPHA and CPOL
bits determine the SCK edge on which the slave MCU latches incoming data from the
MOSI pin and drives outgoing data from the MISO pin.
Two bits in the SPCR determine SCK phase and polarity. The clock polarity (CPOL)
bit selects clock polarity (high true or low true clock). The clock phase control bit
(CPHA) selects one of two transfer formats and affects the timing of the transfer. The
clock phase and polarity should be the same for the master and slave devices. In some
cases, the phase and polarity may be changed between transfers to allow a master
device to communicate with slave devices with different requirements. The flexibility
of the SPI system allows it to be directly interfaced to almost any existing synchronous
serial peripheral.
1. Write to the MMCR and interrupt registers. Refer to
2. Write to the MPAR to assign the following pins to the SPI: MISO, MOSI, and
3. Write to the MDDR to direct the data flow on SPI pins. Configure the SCK,
4. Write to the SPCR to assign values for CPHA, CPOL, SIZE, LSBF, WOMP, and
more information.
SS. MISO is used for serial data output in slave mode, and MOSI is used for
serial data input. Either or both may be necessary, depending on the particular
application. SCK is the input serial clock. SS selects the SPI when asserted.
MOSI, and SS pins as inputs. Configure MISO as an output.
SPIE. Set the MSTR bit to select master operation. Set the SPE bit to enable
the SPI. (The BAUD field in the SPCR of the slave device has no effect on SPI
operation.)
MULTICHANNEL COMMUNICATION INTERFACE
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
10.5 MCCI Initialization
M68HC16 Z SERIES
USER’S MANUAL
for

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