MC68HC16Z1CEH16 Freescale Semiconductor, MC68HC16Z1CEH16 Datasheet - Page 429

• Manufacturer Part Number: MC68HC16Z1CEH16
• Description: IC MCU 16BIT 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CEH16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Processor Series: HC16Z
• Core: CPU16
• Data Bus Width: 16 bit
• Controller Family/series: 68HC16
• No. Of I/o's: 26
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: QSPI, SCI
• Rohs Compliant: Yes
• Package: 132PQFP
• Family Name: HC16
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Number Of Programmable I/os: 16
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 11
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

STOP — Low-Power Stop Mode Enable
Bits [14:8] — Not Implemented
SUPV — Supervisor/Unrestricted
Bits [6:4] — Not Implemented
IARB[3:0] — Interrupt Arbitration ID
D.7.2 MCCI Test Register
MTEST — MCCI Test Register
D.7.3 SCI Interrupt Level Register/MCCI Interrupt Vector Register
ILSCI — SCI Interrupt Level Register
Bits [15:14] — Not Implemented
ILSCIA[2:0], ILSCIB[2:0] — Interrupt Level for SCIA, SCIB
M68HC16 Z SERIES
USER’S MANUAL
15
NOT USED
RESET:
When STOP is set, the MCCI enters low-power stop mode. The system clock input to
the module is disabled. While STOP is set, only MMCR reads and writes are guaran-
teed to be valid. Only writes to other MCCI registers are guaranteed valid. The SCI re-
ceiver and transmitter must be disabled before STOP is set. To stop the SPI, set the
HALT bit in SPCR3, wait until the HALTA flag is set, then set STOP.
This bit has no effect because the CPU16 in the MCU operates only in supervisor
mode.
The IARB field is used to arbitrate between simultaneous interrupt requests of the
same priority. Each module that can generate interrupt requests must be assigned a
unique, non-zero IARB field value.
Used for factory test only.
The values of ILSCIA[2:0] and ILSCIB[2:0] in ILSCI determine the interrupt request
levels of SCIA and SCIB interrupts, respectively. Program this field to a value from $0
(interrupts disabled) through $7 (highest priority).
0 = MCCI clock operates normally.
1 = MCCI clock is stopped.
14
13
0
ILSCIB[2:0]
12
0
Freescale Semiconductor, Inc.
11
0
For More Information On This Product,
10
0
ILSCIA[2:0]
Go to: www.freescale.com
REGISTER SUMMARY
9
0
8
0
7
0
6
0
5
0
4
0
MIVR
3
1
2
1
$YFFC02
$YFFC04
1
1
D-55
0
1