MC68HC16Z1CEH16 Freescale Semiconductor, MC68HC16Z1CEH16 Datasheet - Page 194

• Manufacturer Part Number: MC68HC16Z1CEH16
• Description: IC MCU 16BIT 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CEH16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Processor Series: HC16Z
• Core: CPU16
• Data Bus Width: 16 bit
• Controller Family/series: 68HC16
• No. Of I/o's: 26
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: QSPI, SCI
• Rohs Compliant: Yes
• Package: 132PQFP
• Family Name: HC16
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Number Of Programmable I/os: 16
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 11
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

8.7.5.1 Conversion Parameters
8.7.5.2 Conversion Modes
8-8
Single or multiple channel conversion
Table 8-5
Conversion modes are defined by the state of the SCAN, MULT, and S8CM bits in
ADCTL1.
The following paragraphs describe each type of conversion mode:
Mode 0 — A single four-conversion sequence is performed on a single input channel
specified by the value in CD:CA. Each result is stored in a separate result register
(RSLT0 to RSLT3). The appropriate CCF bit in ADCSTAT is set as each register is
filled. The SCF bit in ADCSTAT is set when the conversion sequence is complete.
Mode 1 — A single eight-conversion sequence is performed on a single input channel
specified by the value in CD:CA. Each result is stored in a separate result register
(RSLT0 to RSLT7). The appropriate CCF bit in ADCSTAT is set as each register is
filled. The SCF bit in ADCSTAT is set when the conversion sequence is complete.
Single or continuous conversion
Conversion Parameter
Conversion channel
Length of sequence
Table 8-6
Table 8-5 Conversion Parameters Controlled by ADCTL1
describes the conversion parameters controlled by bits in ADCTL1.
Freescale Semiconductor, Inc.
SCAN
shows mode numbering.
For More Information On This Product,
0
0
0
0
1
1
1
1
Table 8-6 ADC Conversion Modes
ANALOG-TO-DIGITAL CONVERTER
Go to: www.freescale.com
The value of the channel selection field (CD:CA) in ADCTL1 determines
which multiplexer inputs are used in a conversion sequence. There are
16 possible inputs. Seven inputs are external pins (AN[6:0]), and nine
are internal.
A conversion sequence consists of either four or eight conversions. The
number of conversions in a sequence is determined by the state of the
S8CM bit in ADCTL1.
Conversion can be limited to a single sequence or a sequence can be
performed continuously. The state of the SCAN bit in ADCTL1 deter-
mines whether single or continuous conversion is performed.
Conversion sequence(s) can be run on a single channel or on a block of
four or eight channels. Channel conversion is controlled by the state of
the MULT bit in ADCTL1.
MULT
0
0
1
1
0
0
1
1
S8CM
0
1
0
1
0
1
0
1
Description
Mode
0
1
2
3
4
5
6
7
M68HC16 Z SERIES
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