MC68HC16Z1CEH16 Freescale Semiconductor, MC68HC16Z1CEH16 Datasheet - Page 448

IC MCU 16BIT 16MHZ 132-PQFP

MC68HC16Z1CEH16

Manufacturer Part Number
MC68HC16Z1CEH16
Description
IC MCU 16BIT 16MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheets

Specifications of MC68HC16Z1CEH16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Processor Series
HC16Z
Core
CPU16
Data Bus Width
16 bit
Controller Family/series
68HC16
No. Of I/o's
26
Ram Memory Size
1KB
Cpu Speed
16MHz
No. Of Timers
2
Embedded Interface Type
QSPI, SCI
Rohs Compliant
Yes
Package
132PQFP
Family Name
HC16
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Number Of Programmable I/os
16
On-chip Adc
8-chx10-bit
Number Of Timers
11
Data Ram Size
1 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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D.8.13 Timer Interrupt Flag Registers 1 and 2
TFLG1/TFLG2 — Timer Interrupt Flag Registers 1–2
I4/O5F — Input Capture 4/Output Compare 5 Flag
OCF[4:1] — Output Compare Flags
ICF[3:1] — Input Capture Flags
TOF — Timer Overflow Flag
PAOVF — Pulse Accumulator Overflow Flag
PAIF — Pulse Accumulator Flag
D.8.14 Compare Force Register/PWM Control Register C
CFORC — Compare Force Register/PWM Control Register
D-74
I4/O5F
RESET:
15
0
15
0
RESET:
These registers show condition flags that correspond to GPT events. If the corre-
sponding interrupt enable bit in TMSK1/TMSK2 is set, an interrupt occurs.
When I4/O5 in PACTL is zero, this flag is set each time TCNT matches the TOC5 val-
ue in TI4/O5. When I4/O5 in PACTL is one, the flag is set each time a selected edge
is detected at the I4/O5 pin.
An output compare flag is set each time TCNT matches the corresponding TOC reg-
ister. OCF[4:1] correspond to OC[4:1].
A flag is set each time a selected edge is detected at the corresponding input capture
pin. ICF[3:1] correspond to IC[3:1].
This flag is set each time TCNT advances from a value of $FFFF to $0000.
This flag is set each time the pulse accumulator counter advances from a value of $FF
to $00.
In event counting mode, this flag is set when an active edge is detected on the PAI pin.
In gated time accumulation mode, it is set at the end of the timed period.
Setting a bit in CFORC causes a specific output on OC or PWM pins. PWMC sets
PWM operating conditions.
14
0
0
FOC
0
13
0
OCF[4:1]
0
12
0
11
0
Freescale Semiconductor, Inc.
11
0
For More Information On This Product,
10
0
0
10
0
FPWMA
Go to: www.freescale.com
ICF[3:1]
REGISTER SUMMARY
9
0
9
0
FPWMB
8
0
8
0
TOF
PPROUT
7
0
7
0
6
0
0
6
0
PAOVF
5
0
PPR
0
PAIF
4
0
4
0
3
0
0
SFA
3
0
M68HC16 Z SERIES
USER’S MANUAL
SFB
2
0
0
2
0
$YFF922
$YFF924
F1A
1
0
0
1
0
F1B
0
0
0
0
0

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