MC68HC16Z1CEH16 Freescale Semiconductor, MC68HC16Z1CEH16 Datasheet - Page 191

IC MCU 16BIT 16MHZ 132-PQFP

MC68HC16Z1CEH16

Manufacturer Part Number
MC68HC16Z1CEH16
Description
IC MCU 16BIT 16MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheets

Specifications of MC68HC16Z1CEH16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Processor Series
HC16Z
Core
CPU16
Data Bus Width
16 bit
Controller Family/series
68HC16
No. Of I/o's
26
Ram Memory Size
1KB
Cpu Speed
16MHz
No. Of Timers
2
Embedded Interface Type
QSPI, SCI
Rohs Compliant
Yes
Package
132PQFP
Family Name
HC16
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Number Of Programmable I/os
16
On-chip Adc
8-chx10-bit
Number Of Timers
11
Data Ram Size
1 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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8.6.2 Sample Capacitor and Buffer Amplifier
8.6.3 RC DAC Array
M68HC16 Z SERIES
USER’S MANUAL
Each of the eight external input channels is associated with a sample capacitor and
share a single sample buffer amplifier. After a conversion is initiated, the multiplexer
output is connected to the sample capacitor at the input of the sample buffer amplifier
for the first two ADC clock cycles of the sampling period. The sample amplifier buffers
the input channel from the relatively large capacitance of the RC DAC array.
During the second two clock cycles of a sampling period, the sample capacitor is dis-
connected from the multiplexer, and the sample buffer amplifier charges the RC DAC
array with the value stored in the sample capacitor.
During the third portion of a sampling period, both sample capacitor and buffer ampli-
fier are bypassed, and multiplexer input charges the DAC array directly. The length of
this third portion of a sampling period is determined by the value of the STS field in
ADCTL0.
The RC DAC array consists of binary-weighted capacitors and a resistor-divider chain.
The array performs two functions: it acts as a sample hold circuit during conversion,
and it provides each successive digital-to-analog comparison voltage to the compara-
tor. Conversion begins with MSB comparison and ends with LSB comparison. Array
switching is controlled by the digital subsystem.
Freescale Semiconductor, Inc.
Table 8-2 Multiplexer Channel Sources
For More Information On This Product,
[CD:CA] Value
ANALOG-TO-DIGITAL CONVERTER
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Go to: www.freescale.com
(V
Test/Reserved
Input Source
RH
Reserved
Reserved
Reserved
Reserved
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
V
– V
V
RH
RL
RL
) / 2
8-5

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