MC68HC16Z1CEH16 Freescale Semiconductor, MC68HC16Z1CEH16 Datasheet - Page 418

• Manufacturer Part Number: MC68HC16Z1CEH16
• Description: IC MCU 16BIT 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CEH16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Processor Series: HC16Z
• Core: CPU16
• Data Bus Width: 16 bit
• Controller Family/series: 68HC16
• No. Of I/o's: 26
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: QSPI, SCI
• Rohs Compliant: Yes
• Package: 132PQFP
• Family Name: HC16
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Number Of Programmable I/os: 16
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 11
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

NF — Noise Error
FE — Framing Error
PF — Parity Error
D.6.7 SCI Data Register
SCDR — SCI Data Register
D.6.8 Port QS Data Register
PORTQS — Port QS Data Register
D-44
RESET:
15
15
SCDR consists of two data registers located at the same address. The receive data
register (RDR) is a read-only register that contains data received by the SCI serial in-
terface. Data comes into the receive serial shifter and is transferred to RDR. The trans-
mit data register (TDR) is a write-only register that contains data to be transmitted.
Data is first written to TDR, then transferred to the transmit serial shifter, where addi-
tional format bits are added before transmission. R[7:0]/T[7:0] contain either the first
eight data bits received when SCDR is read, or the first eight data bits to be transmitted
when SCDR is written. R8/T8 are used when the SCI is configured for nine-bit opera-
tion. When the SCI is configured for 8-bit operation, R8/T8 has no meaning or effect.
PORTQS latches I/O data. Writes drive pins defined as outputs. Reads return data
present on the pins. To avoid driving undefined data, first write a byte to PORTQS,
then configure DDRQS.
0 = No noise detected in the received data.
1 = Noise detected in the received data.
0 = No framing error detected in the received data.
1 = Framing error or break detected in the received data.
0 = No parity error detected in the received data.
1 = Parity error detected in the received data.
NOT USED
NOT USED
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
REGISTER SUMMARY
9
8
R8/T8
U
8
RESET:
PQS7
R7/T7
7
0
7
U
R6/T6
PQS6
U
6
6
0
R5/T5
PQS5
U
5
5
0
R4/T4
PQS4
U
4
4
0
R3/T3
PQS3
U
3
3
0
M68HC16 Z SERIES
USER’S MANUAL
R2/T2
PQS2
U
2
2
0
$YFFC0E
$YFFC14
R1/T1
PQS1
U
1
1
0
R0/T0
PQS0
0
U
0
0