MC68HC16Z1CEH16 Freescale Semiconductor, MC68HC16Z1CEH16 Datasheet - Page 97

• Manufacturer Part Number: MC68HC16Z1CEH16
• Description: IC MCU 16BIT 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CEH16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Processor Series: HC16Z
• Core: CPU16
• Data Bus Width: 16 bit
• Controller Family/series: 68HC16
• No. Of I/o's: 26
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: QSPI, SCI
• Rohs Compliant: Yes
• Package: 132PQFP
• Family Name: HC16
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Number Of Programmable I/os: 16
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 11
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.13 Exceptions
4.13.1 Exception Vectors
M68HC16 Z SERIES
USER’S MANUAL
Total execution time is calculated using the expression:
Where:
(CL
(CL
(CL
(CL
Refer to the CPU16 Reference Manual (CPU16RM/AD) for more information on this
topic.
An exception is an event that preempts normal instruction processing. Exception pro-
cessing makes the transition from normal instruction execution to execution of a rou-
tine that deals with the exception.
Each exception has an assigned vector that points to an associated handler routine.
Exception processing includes all operations required to transfer control to a handler
routine, but does not include execution of the handler routine itself. Keep the distinc-
tion between exception processing and execution of an exception handler in mind
while reading this section.
An exception vector is the address of a routine that handles an exception. Exception
vectors are contained in a data structure called the exception vector table, which is lo-
cated in the first 512 bytes of bank 0. Refer to
All vectors except the reset vector consist of one word and reside in data space. The
reset vector consists of four words that reside in program space. Refer to
SYSTEM INTEGRATION MODULE
and the function code outputs. There are 52 predefined or reserved vectors, and 200
user-defined vectors.
Each vector is assigned an 8-bit number. Vector numbers for some exceptions are
generated by external devices; others are supplied by the processor. There is a direct
mapping of vector number to vector table address. The processor left shifts the vector
number one place (multiplies by two) to convert it to an address.
T
I
P
O
) = Clock periods used for internal operation
) = Total clock periods per instruction
) = Clock periods used for program access
) = Clock periods used for operand access
Freescale Semiconductor, Inc.
For More Information On This Product,
CENTRAL PROCESSING UNIT
CL
Go to: www.freescale.com
T
=
for information concerning address space types
CL
P
+
Table 4-5
CL
O
+
for the exception vector table.
CL
I
SECTION 5
4-37