MC68HC705B16CFN Freescale Semiconductor, MC68HC705B16CFN Datasheet - Page 197

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MC68HC705B16CFN

Manufacturer Part Number
MC68HC705B16CFN
Description
IC MCU 2.1MHZ 15K OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705B16CFN

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
15KB (15K x 8)
Program Memory Type
OTP
Eeprom Size
256 x 8
Ram Size
352 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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(1) This register is implemented in EEPROM; therefore reset has no effect on the individual bits.
E.3.5
EE1P – EEPROM protect bit
In order to achieve a higher degree of protection, the EEPROM is effectively split into two parts,
both working from the VPP1 charge pump. Part 1 of the EEPROM array (32 bytes from $0100 to
$011F) cannot be protected; part 2 (224 bytes from $0120 to $01FF) is protected by the EE1P bit
in the options register.
When this bit is set to 1 (erased), the protection will remain until the next power-on or external
reset. EE1P can only be written to ‘0’ when the E1LAT bit in the EEPROM control register is set.
Note:
SEC — Secure bit
This bit allows the EPROM and EEPROM1 to be secured from external access. When this bit is
in the erased state (set), the EPROM and EEPROM1 content is not secured and the device may
be used in non user mode. When the SEC bit is programmed to ‘zero’, the EPROM and EEPROM1
content is secured by prohibiting entry to the non user mode. To deactivate the secure bit, the
EPROM has to be erased by exposure to a high density ultraviolet light, and the device has to be
entered into the EPROM erase verification mode with PD1 set. When the SEC bit is changed, its
new value will have no effect until the next power-on or external reset.
MC68HC05B6
Rev. 4.1
1 (set)
0 (clear) –
1 (set)
0 (clear) –
Options (OPTR)
The EEPROM1 protect function is disabled while in bootstrap mode.
EEPROM options register (OPTR)
(1)
Part 2 of the EEPROM array is not protected; all 256 bytes of
EEPROM can be accessed for any read, erase or programming
operations.
Part 2 of the EEPROM array is protected; any attempt to erase or
program a location will be unsuccessful.
EEPROM/EPROM not protected.
EEPROM/EPROM protected.
Address
$0100
bit 7
MC68HC705B16
bit 6
bit 5
bit 4
bit 3
bit 2
EE1P
bit 1
SEC Not affected
bit 0
Freescale
on reset
State
E-9
14

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