MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 164

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

CPU32+
5.3.3.5 SHIFT AND ROTATE INSTRUCTIONS. The arithmetic shift instructions, ASR and
ASL, and logical shift instructions, LSR and LSL, provide shift operations in both directions.
The ROR, ROL, ROXR, and ROXL instructions perform rotate (circular shift) operations,
with and without the extend bit. All shift and rotate operations can be performed on either
registers or memory.
Register shift and rotate operations shift all operand sizes. The shift count may be specified
in the instruction operation word (to shift from 1 to 8 places) or in a register (modulo 64 shift
count).
Memory shift and rotate operations shift word-length operands one bit position only. The
SWAP instruction exchanges the 16-bit halves of a register. Performance of shift/rotate
instructions is enhanced so that use of the ROR and ROL instructions with a shift count of
eight allows fast byte swapping. Table 5-7 is a summary of the shift and rotate operations.
5-22
Instruction
EORI
ANDI
EOR
AND
NOT
TST
ORI
OR
# data
# data
# data
Operand
Dn, ea
Dn, ea
Dn, ea
Syntax
ea , Dn
ea , Dn
ea
ea
Freescale Semiconductor, Inc.
For More Information On This Product,
ea
ea
ea
Table 5-6. Logic Operations
MC68360 USER’S MANUAL
Go to: www.freescale.com
Operand
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
Size
Source
Immediate Data
Source
Immediate Data
Destination
Source V Destination
Immediate Data V Destination
Source – 0, to set condition codes
Destination
Destination
Destination
Destination
Destination
Operation
Destination
Destination
Destination
Destination
Destination
Destination