ST10F269-T3 STMicroelectronics, ST10F269-T3 Datasheet - Page 10

• Manufacturer Part Number: ST10F269-T3
• Manufacturer: STMicroelectronics

Specifications of ST10F269-T3

• Cpu Family: ST10
• Device Core Size: 16b
• Frequency (max): 32MHz
• Interface Type: ASC/I2C/SSC
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 12KB
• # I/os (max): 111
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: CISC/RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Supplier Unconfirmed

ST10F269-T3
10/162
P4.0 –P4.7
WR/WRL
Symbol
READY/
READY
ALE
RD
EA
85-92
Pin
85
86
87
88
89
90
91
92
95
96
97
98
99
Type
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
Port 4 is an 8-bit bidirectional I/O port. It is bit-wise programmable for input or output
via direction bit. Programming an I/O pin as input forces the corresponding output
driver to high impedance state. The input threshold is selectable (TTL or special).
Port 4.6 & 4.7 outputs can be configured as push-pull or open drain drivers.
In case of an external bus configuration, Port 4 can be used to output the segment
address lines:
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
P4.6
P4.7
External Memory Read Strobe. RD is activated for every external instruction or data
read access.
External Memory Write Strobe. In WR-mode this pin is activated for every external
data write access. In WRL mode this pin is activated for low Byte data write
accesses on a 16-bit bus, and for every data write access on an 8-bit bus. See
WRCFG in the SYSCON register for mode selection.
Ready Input. The active level is programmable. When the Ready function is
enabled, the selected inactive level at this pin, during an external memory access,
will force the insertion of waitstate cycles until the pin returns to the selected active
level.
Address Latch Enable Output. In case of use of external addressing or of multi-
plexed mode, this signal is the latch command of the address lines.
External Access Enable pin. A low level applied to this pin during and after Reset
forces the ST10F269-T3 to start the program from the external memory space. A
high level forces the MCU to start in the internal memory space.
A16
A17
A18
A19
A20
CAN2_RxD
A21
CAN1_RxD
A22
CAN1_TxD
A23
CAN2_TxD
Segment Address Line
Segment Address Line
Segment Address Line
Segment Address Line
Segment Address Line
CAN2 Receive Data Input
Segment Address Line
CAN1 Receive Data Input
Segment Address Line
CAN1 Transmit Data Output
Most Significant Segment Address Line
CAN2 Transmit Data Output
Function