ST10F269-T3 STMicroelectronics, ST10F269-T3 Datasheet - Page 49
ST10F269-T3
Manufacturer Part Number
ST10F269-T3
Description
Manufacturer
STMicroelectronics
Datasheet
1.ST10F269-T3.pdf
(162 pages)
Specifications of ST10F269-T3
Cpu Family
ST10
Device Core Size
16b
Frequency (max)
32MHz
Interface Type
ASC/I2C/SSC
Program Memory Type
Flash
Program Memory Size
256KB
Total Internal Ram Size
12KB
# I/os (max)
111
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
16-chx10-bit
Instruction Set Architecture
CISC/RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Figure 13 : Block Diagram of CAPCOM Timers T0 and T7
Figure 14 : Block Diagram of CAPCOM Timers T1 and T8
Note: When
When a capture/compare register has been
selected for capture mode, the current contents of
the allocated timer will be latched (captured) into
the capture/compare register in response to an
external event at the port pin which is associated
with this register. In addition, a specific interrupt
request for this capture/compare register is
generated.
Either a positive, a negative, or both a positive and
a negative external signal transition at the pin can
be selected as the triggering event. The contents
of all registers which have been selected for one
TxIN
CPU
Clock
Over / Underflow
GPT2 Timer T6
CPU
Clock
Over / Underflow
GPT2 Timer T6
Pin
connected to the input lines of both T0 and
T7, these timers count the input signal
synchronously. Thus the two timers can be
regarded as one timer whose contents can
be compared with 32 capture registers.
Edge Select
Txl
an
Txl
Txl
X
X
external
MUX
TxM
Txl TxM
Control
Input
MUX
input
TxR
signal
TxR
is
Reload Register TxREL
CAPCOM Timer Tx
of the five compare modes are continuously
compared with the contents of the allocated
timers.
When a match occurs between the timer value
and the value in a capture /compare register,
specific actions will be taken based on the
selected compare mode (see Table 9).
The input frequencies f
selector Tx, are determined as a function of the
CPU
resolution and periods which result from the
selected pre-scaler option in TxI when using a
32MHz CPU clock are listed in the Table 10.
The numbers for the timer periods are based on a
reload value of 0000h. Note that some numbers
may be rounded to 3 significant figures.
Reload Register TxREL
CAPCOM Timer Tx
clocks.
The
timer
Tx
, for the timer input
TxIR
TxIR
input
ST10F269-T3
frequencies,
Interrupt
Request
x = 1, 8
x = 0, 7
Interrupt
Request
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