ST10F269-T3 STMicroelectronics, ST10F269-T3 Datasheet - Page 29

• Manufacturer Part Number: ST10F269-T3
• Manufacturer: STMicroelectronics

Specifications of ST10F269-T3

• Cpu Family: ST10
• Device Core Size: 16b
• Frequency (max): 32MHz
• Interface Type: ASC/I2C/SSC
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 12KB
• # I/os (max): 111
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: CISC/RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Example 3 Performing the Block Erase command
We assume that in the initialization phase the lowest 32K Bytes of Flash memory (sector 0) have been
mapped to segment 1.The registers R11/R12 contain an address related to the block to be erased
(segment number in R11, segment offset in R12, for example R11 = 01h, R12= 4000h will erase the block
1 - first 8K byte block).
MOV
MOV
SXCT
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
POP
MOV
EXTS
MOV
Erase_Polling:
EXTS
MOV
JB
JNB
Erase_Error:
MOV
EXTS
MOV
...
...
...
Erase_OK:
....
....
R5, #01554h
R6, #02AA8h
DPPO, #08h
R7, #0A8h
[R5], R7
R7, #054h
[R6], R7
R7, #080h
[R5], R7
R7, #0A8h
[R5], R7
R7, #054h
[R6], R7
DPP0
R7, #030h
R11, #1
[R12], R7
R11, #1
R7, [R12]
R7.7, Erase_OK
R7.5, Erase_Polling
R7, #0F0h
R11, #1
[R12], R7
;load auxilary register R5 with command address
;(used in command cycle 1)
;load auxilary register R6 with command address
;(used in command cycle 2)
;push data page pointer 0 and load it to point ;to
;segment 2
;load register R7 with 1st CI enable command
;command cycle 1
;load register R7 with 2cd CI enable command
;command cycle 2
;load register R7 with Block Erase command
;command cycle 3
;load register R7 with 1st CI enable command
;command cycle 4
;load register R7 with 2cd CI enable command
;command cycle 5
;restore DPP0: following addressing to the Flash
;will use EXTended instructions
;R11 contains the segment of the block to be erased
;R12 contains the segment offset address of the
;block to be erased
;load register R7 with erase confirm code
;use EXTended addressing for next MOV instruction
;command cycle 6: the EPC starts execution of
;Erasing Command
;use EXTended addressing for next MOV instruction
;read Flash Status register (FSB) in R7
;Check if FSB.7 = ‘1’ (i.e. R7.7 = ‘1’)
;Check if FSB.5 = 1 (Erasing Error)
;Programming failed: Flash remains in Write
;Operation.
;To go back to normal Read operations, a Read/Reset
;command
;must be performed
;load register R7 with Read/Reset command
;use EXTended addressing for next MOV instruction
;address is don’t care for Read/Reset command
;here place specific Error handling code
;When erasing operation finished succesfully,
;Flash is set back automatically to normal Read Mode
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