ST10F269-T3 STMicroelectronics, ST10F269-T3 Datasheet - Page 62

• Manufacturer Part Number: ST10F269-T3
• Manufacturer: STMicroelectronics

Specifications of ST10F269-T3

• Cpu Family: ST10
• Device Core Size: 16b
• Frequency (max): 32MHz
• Interface Type: ASC/I2C/SSC
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 12KB
• # I/os (max): 111
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: CISC/RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Supplier Unconfirmed

ST10F269-T3
12.3.1 - Alternate Functions of PORT0
When an external bus is enabled, PORT0 is used
as data bus or address/data bus.
Note that an external 8-bit demultiplexed bus only
uses P0L, while P0H is free for I/O (provided that
no other bus mode is enabled).
PORT0 is also used to select the system start-up
configuration. During reset, PORT0 is configured
to input, and each line is held high through an
internal pull-up device.
Each line can now be individually pulled to a low
level (see Section 21.3 - DC Characteristics)
through an external pull-down device. A default
configuration is selected when the respective
PORT0 lines are at a high level. Through pulling
individual lines to a low level, this default can be
changed
applications.
The internal pull-up devices are designed in such
way that an external pull-down resistors (see Data
Sheet specification) can be used to apply a
correct low level.
These external pull-down resistors can remain
connected to the PORT0 pins also during normal
operation, however, care has to be taken in order
to not disturb the normal function of PORT0 (this
might be the case, for example, if the external
resistor value is too low).
Figure 21 : PORT0 I/O and Alternate Functions
62/162
PORT0
General Purpose
Alternate Function
P0H
P0L
Input/Output
according
P0H.7
P0H.6
P0H.5
P0H.4
P0H.3
P0H.2
P0H.1
P0H.0
P0L.7
P0L.6
P0L.5
P0L.4
P0L.3
P0L.2
P0L.1
P0L.0
to
the
Demultiplexed Bus
needs
8-bit
a)
D7
D6
D5
D4
D3
D2
D1
D0
of
the
Demultiplexed Bus
16-bit
b)
With the end of reset, the selected bus
configuration will be written to the BUSCON0
register.
The configuration of the high byte of PORT0, will
be copied into the special register RP0H. This
read-only register holds the selection for the
number of chip selects and segment addresses.
Software can read this register in order to react
according to the selected configuration, if
required.
When the reset is terminated, the internal pull-up
devices are switched off, and PORT0 will be
switched to the appropriate operating mode.
During external accesses in multiplexed bus
modes
intra-segment address as an alternate output
function.
high-impedance input mode to read the incoming
instruction or data. In 8-bit data bus mode, two
memory cycles are required for word accesses,
the first for the low Byte and the second for the
high Byte of the Word.
During write cycles PORT0 outputs the data Byte
or Word after outputting the address. During
external accesses in demultiplexed bus modes
PORT0 reads the incoming instruction or data
Word or outputs the data Byte or Word.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
PORT0
Multiplexed Bus
PORT0
c)
8-bit
first
A15
A14
A13
A12
A11
A10
A9
A8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
is
outputs
then
Multiplexed Bus
16-bit
d)
switched
the
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
16-bit
to