ST10F269-T3 STMicroelectronics, ST10F269-T3 Datasheet - Page 106

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ST10F269-T3

Manufacturer Part Number
ST10F269-T3
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST10F269-T3

Cpu Family
ST10
Device Core Size
16b
Frequency (max)
32MHz
Interface Type
ASC/I2C/SSC
Program Memory Type
Flash
Program Memory Size
256KB
Total Internal Ram Size
12KB
# I/os (max)
111
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
16-chx10-bit
Instruction Set Architecture
CISC/RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / Rohs Status
Supplier Unconfirmed

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0
P WDT
ST10F269-T3
The PONR flag of WDTCON register is set if the output voltage of the internal 2.7V supply falls below the
threshold (typically 2V) of the power-on detection circuit. This circuit is efficient to detect major failures of
the external 5V supply but if the internal 2.7V supply does not drop under 2 volts, the PONR flag is not
set. This could be the case on fast switch-off / switch-on of the 5V supply. The time needed for such a
sequence to activate the PONR flag depends on the value of the capacitors connected to the supply and
on the exact value of the internal threshold of the detection circuit.
Table 26 : WDTCON Bit Value on Different Resets
Notes: 1. PONR bit may not be set for short supply failure.
In case of bi-directional reset is enabled, and if the RSTIN pin is latched low after the end of the internal
reset sequence, then a Short hardware reset, a software reset or a watchdog reset will trigger a Long
hardware reset. Thus, Reset Indications flags will be set to indicate a Long Hardware Reset.
The Watchdog Timer is 16-bit, clocked with the system clock divided by 2 or 128. The high Byte of the
watchdog timer register can be set to a pre-specified reload value (stored in WDTREL).
Each time it is serviced by the application software, the high byte of the watchdog timer is reloaded. For
security, rewrite WDTCON each time before the watchdog timer is serviced
The Table 27 shows the watchdog time range for 32MHz CPU clock.
Table 27 : WDTREL Reload Value
The watchdog timer period is calculated with the following formula:
106/162
Power On Reset
Power on after partial supply failure
Long Hardware Reset
Short Hardware Reset
Software Reset
Watchdog Reset
2. For power-on reset and reset after supply partial failure, asynchronous reset must be used.
Reload value in WDTREL
=
-------------- -
f CPU
Reset Source
1
FFh
00h
×
512
×
(
1
+
[
WDTIN ]
PONR
×
1) 2)
X
63 )
2 (WDTIN = ‘0’)
×
4.096ms
16.0µs
(
256
LHWR
X
X
X
[
Prescaler for f
WDTREL ] )
SHWR
X
X
X
X
CPU
= 32MHz
128 (WDTIN = ‘1’)
SWR
1.024ms
262.1ms
X
X
X
X
X
X
WDTR
X

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