ST10F269-T3 STMicroelectronics, ST10F269-T3 Datasheet - Page 90

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ST10F269-T3

Manufacturer Part Number
ST10F269-T3
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST10F269-T3

Cpu Family
ST10
Device Core Size
16b
Frequency (max)
32MHz
Interface Type
ASC/I2C/SSC
Program Memory Type
Flash
Program Memory Size
256KB
Total Internal Ram Size
12KB
# I/os (max)
111
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
16-chx10-bit
Instruction Set Architecture
CISC/RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / Rohs Status
Supplier Unconfirmed

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ST10F269-T3
13 - A/D CONVERTER
A 10-bit A/D converter with 16 multiplexed input
channels and a sample and hold circuit is
integrated on-chip. The sample time (for loading
the capacitors) and the conversion time is
programmable and can be adjusted to the
external circuitry.
To remove high frequency components from the
analog input signal, a low-pass filter must be con-
nected at the ADC input.
Overrun error detection / protection is controlled
by the ADDAT register. Either an interrupt request
is generated when the result of a previous
conversion has not been read from the result
register at the time the next conversion is
complete, or the next conversion is suspended
until the previous result has been read. For
applications which require less than 16 analog
input channels, the remaining channel inputs can
be used as digital input port pins. The A/D
converter of the ST10F269-T3 supports different
conversion modes:
– Single channel single conversion: the analog
– Single channel continuous conversion: the
Table 22 : ADC Sample Clock and Conversion Clock
Notes: 1. Section 21.4.5 - Direct Drive for TCL definition.
90/162
ADCON 15/14
level of the selected channel is sampled once
and converted. The result of the conversion is
stored in the ADDAT register.
analog level of the selected channel is repeated-
ly sampled and converted. The result of the con-
version is stored in the ADDAT register.
ADCTC
2. t
00
01
10
11
CC
= TCL x 24
Reserved, do not use
TCL
1
TCL x 24
TCL x 96
TCL x 48
= 1/2 x f
Conversion Clock t
XTAL
At f
CPU
Reserved
0.375µs
0.75 µs
CC
1.5 µs
= 32MHz
– Auto scan single conversion: the analog level
– Auto scan continuous conversion: the analog
– Wait for ADDAT read mode: when using con-
– Channel
ADCON 13/12
of the selected channels are sampled once and
converted. After each conversion the result is
stored in the ADDAT register. The data can be
transferred to the RAM by interrupt software
management or using the powerful Peripheral
Event Controller (PEC) data transfer.
level of the selected channels are repeatedly
sampled and converted. The result of the con-
version is stored in the ADDAT register. The
data can be transferred to the RAM by interrupt
software management or using the PEC data
transfer.
tinuous modes, in order to avoid to overwrite
the result of the current conversion by the next
one, the ADWR bit of ADCON control register
must be activated. Then, until the ADDAT regis-
ter is read, the new result is stored in a tempo-
rary buffer and the conversion is on hold.
continuous modes, a selected channel can be
converted in between without changing the
current operating mode. The 10-bit data of the
conversion are stored in ADRES field of
ADDAT2. The current continuous mode remains
active after the single conversion is completed.
ADSTC
00
01
10
11
injection
t
t
t
CC
CC
CC
t
SC
t
CC
x 2
x 4
x 8
Sample Clock t
=
mode:
At f
when
CPU
0.375µs
0.75µs
1.50µs
3.00µs
SC
= 32MHz
2
2
2
using
2

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