ST10F269-T3 STMicroelectronics, ST10F269-T3 Datasheet - Page 112

• Manufacturer Part Number: ST10F269-T3
• Manufacturer: STMicroelectronics

Specifications of ST10F269-T3

• Cpu Family: ST10
• Device Core Size: 16b
• Frequency (max): 32MHz
• Interface Type: ASC/I2C/SSC
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 12KB
• # I/os (max): 111
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: CISC/RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Supplier Unconfirmed

ST10F269-T3
The R0-C0 components on RPD pin are mainly implemented to provide a time delay to exit Power down
mode (see Chapter 19 - Power Reduction Modes). Nevertheless, they drive RPD pin level during resets
and they lead to different reset modes as explained hereafter. On power-on, C0 is totally discharged, a
low level on RPD pin forces an asynchronous hardware reset. C0 capacitor starts to charge through R0
and at the end of reset sequence ST10F269-T3 restarts. RPD pin threshold is typically 2.5V.
Depending on the delay of the next applied reset, the MCU can enter a synchronous reset or an
asynchronous reset. If RPD pin is below 2.5V an asynchronous reset starts, if RPD pin is above 2.5V a
synchronous reset starts. (See Section 18.1 - Long Hardware Reset and Section 18.2 - Short Hardware
Reset).
Note that an internal pull-down is connected to RPD pin and can drive a 100µA to 200µA current. This
Pull-down is turned on when RSTIN pin is low.
To properly use the bidirectional reset features, the schematic (or equivalent) of Figure 60 must be
implemented. R1-C1 only work for power-on or manual reset in the same way as explained previously. D1
diode brings a faster discharge of C1 capacitor at power-off during repetitive switch-on / switch-off
sequences. D2 diode performs an OR-wired connection, it can be replaced with an open drain buffer. R2
resistor may be added to increase the pull-up current to the open drain in order to get a faster rise time on
RSTIN pin when bidirectional function is activated.
The start-up configurations and some system features are selected on reset sequences as described in
Table 29 and Table 30.
Table 29 describes what is the system configuration latched on PORT0 in the five different reset ways.
Table 30 summarizes the state of bits of PORT0 latched in RP0H, SYSCON, BUSCON0 registers.
Figure 58 : Internal (simplified) Reset Circuitry.
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Internal
Reset
Signal
EINIT Instruction
Reset State
Machine
Clock
Clr
Trigger
Asynchronous
Reset
Reset Sequence
(512 CPU Clock Cycles)
Set
Clr
From/to Exit
Powerdown
Circuit
Q
SRST instruction
watchdog overflow
BDRSTEN
V
V
DD
DD
Weak pull-down
(~200µA)
RSTOUT
RSTIN
RPD