LSISASX12 LSI, LSISASX12 Datasheet - Page 113

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

Register: 0x40A0
Read Only
31
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RTP
This register tracks the number of successfully transmitted
(acknowledged) data bytes.
R
NBT
Configuration Manager Registers
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
24 23
API2C Transmit Bytes Transferred
Receive Transfer in Process
When this bit is set, it indicates that the master state
machine is processing the receive (read) part of a data
transfer.
This bit sets to 1 at the start of the receive transfer. The
bit clears to 0 when the receive transfer completes and
this register is read.
Reserved
These bits are reserved.
Number of Bytes Transmitted
This field counts the number of acknowledged data bytes
that are transferred in the transmit direction. The register
clears each time a start or repeated start occurs, and
counts the data bytes that are transferred after the
address phase of an API2C transaction. If a data transfer
stops due to an abnormal termination, the software can
use the value in this register to determine how to com-
plete the transfer.
16 15
8 7
0
0 0 0 0
[31:8]
0
[7:0]
4-35
0
0
0