LSISASX12 LSI, LSISASX12 Datasheet - Page 141

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

Register: 0xC018
Read/Write
31
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
The SIO Output Data Control registers provide data output control for
PHY[11:0]. Each SIO Output Data register uses one of two possible bit
field definitions. One bit field definition provides the bit definitions for the
standard SGPIO mode; the other bit field definition provides the bit
definitions for the enhanced SGPIO mode only available on the
LSISASx12A.
Each byte of this register generates 3 serialized I/O bits on the SioDout
line. This register controls SIO bits [23:12], which are for devices 7
through 4.
See the encoding for Error, Active, and Locate bits above as defined in
register 0xC014.
The following are the bit definitions for standard SIO mode:
Configuration Manager Registers
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
24 23
SIO Output Data Control 1
SIO bit 23: Error Device 7
SIO bit 22: Locate Device 7
SIO bit 21: Active Device 7
SIO bit 20: Error Device 6
SIO bit 19: Locate Device 6
SIO bit 18: Active Device 6
SIO bit 17: Error Device 5
SIO bit 16: Locate Device 5
SIO bit 15: Active Device 5
SIO bit 14: Error Device 4
SIO bit 13: Locate Device 4
16 15
8 7
0
0 0 0 0
[31:29]
[28:27]
[26:24]
[23:21]
[20:19]
[18:16]
[15:13]
[12:11]
[10:8]
0
[7:5]
[4:3]
4-63
0
0