LSISASX12 LSI, LSISASX12 Datasheet - Page 93

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

Register: 0x0044
Read/Write
Register: 0x004C
Read/Write
31
31
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Configuration Manager Registers
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
24 23
24 23
Reserved
SMP Target Enable
Setting this bit enables the SMP Target within the
expander. The boot loader writes this field during initial-
ization. The value of this field is passed to the SMP target
after the boot checksum is validated.
STP Target Enable
Setting this bit enables the STP Target and SEMB func-
tions within the expander. The boot loader writes this field
during initialization. The value of this field is passed to
the STP target after the boot checksum is validated.
Phy Enables
This field contains the enable bits for each phy. The boot
loader writes this field during initialization. The value of
this field is passed to each phy after the boot checksum
is validated. Bit [0] corresponds to Phy [0], while bit [11]
corresponds to Phy [11].
Reserved
Phy Transmit Polarity
Phy Transmit Polarity
Phy Configuration
16 15
16 15
8 7
8 7
0
0
0 0 0 0
0 0 0 0
[31:14]
[31:12]
[11:0]
[11:0]
0
0
4-15
13
12
0
0
0
0