LSISASX12 LSI, LSISASX12 Datasheet - Page 96

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

Register: 0x4008
Read/Write
4-18
31
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ME
This register reports the status of the master state machine interrupt
sources.
R
MI
Register Descriptions
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
24 23
Master Enable
This bit enables the API2C master state machine.
ME
0
1
Reserved
These bits are reserved.
Master Interrupt
This bit reflects the logical OR of the master interrupt
sources in the
and determines the master contribution to the external
IRQ signal.
MI
0
1
API2C Interrupt Status
Master Interrupt
Either disabled or none of the master interrupt
sources are set.
Enabled and one or more of the master interrupt
sources are set.
16 15
API2C Master State
API2C Master Interrupt Status
Machine
Disable
Enable
8 7
0
0 0 0 0
register,
[31:1]
0
0
0
0
0