LSISASX12 LSI, LSISASX12 Datasheet - Page 79
LSISASX12
Manufacturer Part Number
LSISASX12
Description
Manufacturer
LSI
Datasheet
1.LSISASX12.pdf
(268 pages)
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Chapter 4
Register Descriptions
This chapter provides the address map and register descriptions for the
LSISASx12 expander chip. This chapter contains the following sections:
Do not access reserved address spaces and reserved bits.
Section 4.1, “Primary Internal Registers Address Map”
Section 4.6, “Expander Connection Manager Registers,” on page 4-124
document the primary internal registers of the LSISASx12.
“EMB Slave Registers,” on page 4-133
The EMB register space uses a separate address space than the
primary internal registers, and can only be accessed through the EMB
I
LSISASx12/LSISASx12A 3.0 Gbit/s SAS/SATA Expander Technical Manual 4-1
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
2
C port.
Section 4.1, “Primary Internal Registers Address Map”
Section 4.2, “Configuration Manager Registers”
Section 4.3, “SMP Target Registers”
Section 4.4, “SPhynx Registers”
Section 4.5, “STP Target Registers”
Section 4.6, “Expander Connection Manager Registers”
Section 4.7, “EMB Slave Registers”
documents the EMB registers.
through
Section 4.7,
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