LSISASX12 LSI, LSISASX12 Datasheet - Page 26

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

2.1.2
2.1.3
2-4
SPhynx[n]
SMP Target
The SPhynx[n] modules contain SAS physical, phy, and link layer
functionality. The SPhynx[n] modules interface with the connection
manager and the connection router to establish connections between
ports. Each SPhynx[n] module contains a GigaBlaze core that converts
the serial receive data to a parallel format, and converts the parallel
transmit data to a serial format. Each SPhynx module can also function
as an STP to SATA bridge. The LSISASx12 expander contains
12 SPhynx[n] modules, one for each port. The modules are numbered
SPhynx[0] to SPhynx[11]. These modules are also referred to as Phy[0]
to Phy[11].
The SMP target supports SMP functions on the LSISASx12 expander.
This block decodes SMP packets destined to the expander device and
performs the requested operation. The SMP target also provides
generation of SMP response frames.
The SMP target consists of:
The SMP Target is responsible for the following tasks:
Functional Description
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
SMP link layer
SMP register bus interface slave
SMP port layer
SMP transport layer
SMP application layer
Receiving SMP OPEN address frames (OAF)
Transmitting OPEN_REJECT(PROTOCOL NOT SUPPORTED)
frames in response to OAFs when the:
–
–
–
Transmitting OPEN_REJECT(RETRY) in response to OAFs if the
Application Layer is processing an SMP Request
OAF protocol is not SMP
OAF initiator bit is cleared to 0b0
OAF Features bits [3:0] are not 0b0000