n25q064 Numonyx, n25q064 Datasheet - Page 104
n25q064
Manufacturer Part Number
n25q064
Description
64mb 1.8v, Multiple I/o, 4kb Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet
1.N25Q064.pdf
(154 pages)
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Instructions
104/154
S
C
DQ0
DQ1
Apart form the parallelizing of the instruction code on the two pins DQ0 and DQ1, the
instruction functionality is exactly the same as the Release from Deep-Power-down (RDP)
instruction of the Extended SPI protocol. The instruction sequence is shown in
Release from Deep Power-down instruction
Figure 73. Release from Deep Power-down instruction sequence
0
Instruction
1
2
3
High Impedance
Deep power-down mode
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
RDP
sequence.
Standby mode
©2010 Micron Technology, Inc. All rights reserved.
N25Q064 - 1.8V
Figure 73:
Dual_RDP