n25q064 Numonyx, n25q064 Datasheet - Page 95

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n25q064

Manufacturer Part Number
n25q064
Description
64mb 1.8v, Multiple I/o, 4kb Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet

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N25Q064 - 1.8V
9.2.10
9.2.11
DQ0
DQ1
*Address bit A23 is “Don’t Care.”
C
S
DQ0
DQ1
*Address bit A23 is “Don’t Care.”
C
S
Figure 55. Subsector Erase instruction sequence DIO-SPI
Sector Erase (SE)
The Sector Erase (SE) instruction sets to '1' (FFh) all bits inside the chosen sector. Before it
can be accepted, a Write Enable (WREN) instruction must previously have been executed.
Apart form parallelizing the instruction code and the address on the two pins DQ0 and DQ1,
the instruction functionality is the same as the Sector Erase (SE) instruction of the Extended
SPI protocol, please refer to
Figure 56. Sector Erase instruction sequence DIO-SPI
Bulk Erase (BE)
The Bulk Erase (BE) instruction sets all bits to '1' (FFh). Before it can be accepted, a Write
Enable (WREN) instruction must previously have been executed.
Apart form the parallelizing of the instruction code on the two pins DQ0 and DQ1, the
instruction functionality is exactly the same as the Bulk Erase (BE) instruction of the
Extended SPI protocol, please refer to
0
Instruction
1
0
Instruction
2
1
3
2
23 21 19 17
22 20 18 16
4
Section 9.1.19: Sector Erase (SE)
3
23 21 19 17
22 20 18 16
5
4
6
5
Section 9.1.20: Bulk Erase (BE)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
6
7
24-Bit Address*
15 13 11 9
14 12 10 8
7
8
24-Bit Address*
15 13 11
14 12 10
8
9 10 11
9
10 11
9
8
12 13 14 15
7
6
12 13 14 15
for further details.
©2010 Micron Technology, Inc. All rights reserved.
7
6
5
4
5
4
3
2
3
2
for further details.
1
Dual_S ector_E rase
1
0
0
Instructions
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