n25q064 Numonyx, n25q064 Datasheet - Page 131

• Manufacturer Part Number: n25q064
• Description: 64mb 1.8v, Multiple I/o, 4kb Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

N25Q064 - 1.8V
10.1
Table 23.
(WRNVCR
opcode)
B1h
6 dummy cycles
Figure 105. N25Q064 Read functionality Flow Chart
Enter XIP mode: Set the Non Volatile Configuration Register
To use the Non Volatile Configuration Register method to enter in XIP mode it is necessary
to set the Non Volatile Configuration Register bits from 11 to 9 with the pattern
corresponding to the required XIP mode by mean of the Write Non Volatile Configuration
Register (WRNVCR) instruction. This instruction doesn't affect the XIP state until the next
Power on sequence. In this case, after the next power on sequence, the memory directly
accept addresses and then, after the dummy clock cycles (configurable), outputs the data
as described below. For example to enable XIP on QIOFR in normal SPI protocol with six
dummy clock cycles the following pattern must be issued:
NVCR XIP bits setting example
for fast read
instructions
+ 0110
default; Quad
Yes
XIP set as
I/O mode
XiP Confirmation
Is XIP enabled ?
NVCR Check
100
Power On
XIP mode
bit = 0 ?
Yes
No
No
driver strength
Output Buffer
SPI standard mode (no
XiP, VCR <3> = 1)
default
111
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Don’t Care
VCR<3> = 0 ?
x
No
Yes
No
not disabled
Hold/Reset
SPI mode (no XIP) but
Read Instructions ?
ready to enter XIP
XiP Confirmation
1
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bit = 0 ?
Yes
Yes
SPI protocol
No
Extended
XIP Operations
11
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Don’t
Care
xx