n25q064 Numonyx, n25q064 Datasheet - Page 31

• Manufacturer Part Number: n25q064
• Description: 64mb 1.8v, Multiple I/o, 4kb Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

N25Q064 - 1.8V
6.1
6.1.1
6.1.2
6.1.3
A Flag Status Register (FSR), 8 bits, is also available to check the status of the device,
detecting possible errors or a Program/Erase internal cycle in progress.
Each register can be read and modified by means of dedicated instructions in all the 3
protocols (Extended SPI, DIO-SPI, and QIO-SPI).
Reading time for all registers is comparable; writing time instead is very different: NVCR bits
are set as Flash Cell memory content requiring a longer time to perform internal writing
cycles. See
Legacy SPI Status Register
The Status Register contains a number of status and control bits that can be read or set by
specific instructions: Read Status Register (RDSR) and Write Status Register (WRSR). This
is available in all the 3 protocols (Extended SPI, DIO-SPI, and QIO-SPI).
Table 2.
WIP bit
The Write In Progress (WIP) bit set to 1 indicates that the memory is busy with a Write
Status Register, Program or Erase cycle. 0 indicates no cycle is in progress.
WEL bit
The Write Enable Latch (WEL) bit set to 1 indicates that the internal Write Enable Latch is
set. When set to 0 the internal Write Enable Latch is reset and no Write Status Register,
Program or Erase instruction is accepted.
BP3, BP2, BP1, BP0 bits
The Block Protect (BP3, BP2, BP1, BP0) bits are non-volatile. They define the size of the
area to be software protected against Program and Erase instructions. These bits are
written with the Write Status Register (WRSR) instruction. When one or more of the Block
Protect (BP3, BP2, BP1, BP0) bits is set to 1, the relevant memory area, as defined in
10.: Protected area sizes (TB bit = 0)
instructions. The Block Protect (BP3, BP2, BP1, BP0) bits can be written provided that the
Hardware Protected mode has not been set. The Bulk Erase (BE) instruction is executed if,
and only if, all Block Protect (BP3, BP2, BP1, BP0) bits are 0.
Status register write protect
SRWD
b7
Table 31.: AC
Status register format
BP3
Characteristics.
Top/bottom bit
TB
becomes protected against all program and erase
Micron Technology, Inc., reserves the right to change products or specifications without notice.
BP2
Block protect bits
BP1
Volatile and Non Volatile Registers
Write enable latch bit
BP0
©2010 Micron Technology, Inc. All rights reserved.
WEL
Write in progress bit
WIP
b0
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Table