n25q064 Numonyx, n25q064 Datasheet - Page 110

• Manufacturer Part Number: n25q064
• Description: 64mb 1.8v, Multiple I/o, 4kb Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

Instructions
9.3.4
Note:
110/154
DQ0
DQ1
DQ3
DQ2
C
*This bit is “Don’t Care. ”
S
Mode 3
Mode 0
Figure 78. Quad Command Fast Read instruction and data-out sequence QSP, EBh
Read OTP (ROTP)
The Read OTP (ROTP) instruction is used to read the 64 bytes OTP area in the QIO-SPI
protocol. The instruction functionality is exactly the same as the Read OTP instruction of the
Extended SPI protocol. The only difference is that in the QIO-SPI protocol instruction code,
address and output data are all parallelized on the four pins DQ0, DQ1, DQ2 and DQ3.
The dummy byte bits can not be parallelized: 8 clock cycles are requested to perform the
internal reading operation.
Instruction
0
1
A23-16 A15-8 A7-0
7* 3
5
4
6
2
1
0
2
3
5
4
6
7
4
1
0
2
3
5
5
4
6
7
6
1
0
2
3
7
8
9 10
Dummy (ex.: 10)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
15 16 17 18
Byte 1 Byte 2
IO switches from Input to Output
4
5
6
7
1
19
0
3
2
20
4
5
7
6
21
1
0
3
2
©2010 Micron Technology, Inc. All rights reserved.
22
4
Byte 3 Byte 4
5
7
6
23
0
1
3
2
24
4
5
7
6
25 26 27
0
1
3
2
N25Q064 - 1.8V
4
4
4
Byte 5 Byte 6
4
0
0
0
0
4
4
4
4
0
0
0
0