n25q064 Numonyx, n25q064 Datasheet - Page 98

• Manufacturer Part Number: n25q064
• Description: 64mb 1.8v, Multiple I/o, 4kb Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

Instructions
9.2.16
9.2.17
98/154
DQ0
DQ1
*Address bit A23 is “Don’t Care. ”
C
S
Figure 61. Write Status Register instruction sequence DIO-SPI
Read Lock Register (RDLR)
The Read Lock Register instructions is used to read the lock register content.
Apart form the parallelizing of the instruction code, the address and the output data on the
two pins DQ0 and DQ1, the instruction functionality is exactly the same as the Read Lock
Register (RDLR) instruction of the Extended SPI protocol, please refer to
Read Lock Register (RDLR)
Figure 62. Read Lock Register instruction and data-out sequence DIO-SPI
Write to Lock Register (WRLR)
The Write to Lock Register (WRLR) instruction allows bits to be changed in the Lock
Registers. Before it can be accepted, a Write Enable (WREN) instruction must previously
have been executed.
Apart form the parallelizing of the instruction code, the address and the input data on the
two pins DQ0 and DQ1, the instruction functionality is exactly the same as the Write to Lock
Register (WRLR) instruction of the Extended SPI protocol, please refer to
Write to Lock Register (WRLR)
DQ0
*Address bit A23 is “Don’t Care.”
0
DQ1
C
S
Instruction
1
2
3
23 21 19 17
22 20 18 16
4
5
for further details.
for further details.
0
6
Instruction
7
1
24-Bit Address*
15 13 11 9
14 12 10 8
8
2
Micron Technology, Inc., reserves the right to change products or specifications without notice.
9 10 11
3
Status Register In
7
6
4
5
4
5
Byte
12 13 14 15
7
6
3
2
6
5
4
1
0
7
3
2
1
0
©2010 Micron Technology, Inc. All rights reserved.
16 17 18 19
Lock Register Out
7
6
5
4
3
2
Section 9.1.25:
Section 9.1.26:
1
N25Q064 - 1.8V
0