n25q064 Numonyx, n25q064 Datasheet - Page 108

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n25q064

Manufacturer Part Number
n25q064
Description
64mb 1.8v, Multiple I/o, 4kb Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet

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Instructions
9.3.2
Note:
9.3.3
108/154
DQ0
DQ3
DQ1
DQ2
*This bit is “Don’t Care. ”
The dummy clock cycle depends on the Fast Read configuration in the NVCR/VCR register (default = 8).
C
S
Mode 3
Mode 0
Read Serial Flash Discovery Parameter
The Read Serial Flash Discovery Parameter (RDSFDP) instruction allows reading the Serial
Flash Discovery Parameter area (SFDP) in the QIO-SPI protocol. The instruction
functionality is exactly the same as the Read Serial Flash Discovery Parameter instruction
of the Extended SPI protocol. The only difference is that in the QIO-SPI protocol instruction
code, address and output data are all parallelized on the four pins DQ0, DQ1, DQ2 and
DQ3.
The dummy byte bits can not be parallelized: 8 clock cycles are requested to perform the
internal reading operation.
Figure 75. Quad Read Serial Flash Discovery Parameter
Quad Command Fast Read (QCFR)
The Quad Command Fast Read (QCFR) instruction allows to read the memory in QIO-SPI
protocol, parallelizing the instruction code, the address and the output data on four pins
(DQ0, DQ1, DQ2 and DQ3). The Quad Command Fast Read (QCFR) instruction can be
issued, after the device is set in QIO-SPI mode, by sending to the memory indifferently one
of the 3 instructions codes: 0Bh, 6Bh or EBh, the effect is exactly the same. The 3
instruction codes are all accepted to help the application code porting from Extended SPI
protocol to QIO-SPI protocol.
Apart for the parallelizing on four pins of the instruction code, the Quad Command Fast
Read instruction functionality is exactly the same as the Quad I/O Fast Read of the
Extended SPI protocol, please refer to
Instruction
0
1
A23-16 A15-8 A7-0
7* 3
5
4
6
2
1
0
2
3
5
4
6
7
4
1
0
2
3
5
5
4
6
7
6
1
0
2
3
7
8
9 10
Dummy (ex.: 10)
Section 9.1.8: Quad I/O Fast Read
Micron Technology, Inc., reserves the right to change products or specifications without notice.
15 16 17 18
Byte 1 Byte 2
IO switches from Input to Output
5
4
6
7
1
19
0
3
2
20
5
4
7
6
21
0
1
3
2
©2010 Micron Technology, Inc. All rights reserved.
22
Byte 3 Byte 4
4
5
7
6
23
0
1
3
2
Quad_Read_Serial_Flash_Discovery_Parameter
24
4
5
7
6
25 26 27
0
1
3
2
for further details.
N25Q064 - 1.8V
4
4
4
Byte 5 Byte 6
4
0
0
0
0
4
4
4
4
0
0
0
0

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