n25q064 Numonyx, n25q064 Datasheet - Page 90

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n25q064

Manufacturer Part Number
n25q064
Description
64mb 1.8v, Multiple I/o, 4kb Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet

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Instructions
9.2.1
9.2.2
Note:
90/154
Multiple I/O Read Identification protocol
The Multiple Input/Output Read Identification (MIORDID) instruction allows to read the
device identification data in the DIO-SPI protocol:
Unlike the RDID instruction of the Extended SPI protocol, the Multiple Input/Output
instruction can not read the Unique ID code (UID) (17 bytes).
For further details on the manufacturer and device identification codes please refer to
Section 9.1.1: Read Identification
Any Multiple Input/Output Read Identification (MIORDID) instruction while an Erase or
Program cycle is in progress, is not decoded, and has no effect on the cycle that is in
progress.
The device is first selected by driving Chip Select (S) Low. Then, the 8-bit instruction code
for the instruction is shifted in parallel on the 2 pins DQ0 and DQ1. After this, the 24-bit
device identification, stored in the memory, will be shifted out on again in parallel on DQ1
and DQ0. Each two bits are shifted out during the falling edge of Serial Clock (C).
The Read Identification (RDID) instruction is terminated by driving Chip Select (S) High at
any time during data output.
When Chip Select (S) is driven High, the device is put in the Standby Power mode. Once in
the Standby Power mode, the device waits to be selected, so that it can receive, decode and
execute instructions.
Figure 45. Multiple I/O Read Identification instruction and data-out sequence DIO-
Read Serial Flash Discovery Parameter
The Read Serial Flash Discovery Parameter (RDSFDP) instruction allows to read the Serial
Flash Discovery Parameter area (SFDP) in the DIO-SPI protocol.
The instruction functionality is exactly the same as the Read Serial Flash Discovery
Parameter instruction of the Extended SPI protocol; the only difference is that in the DIO-
SPI protocol instruction code, address and output data are all parallelized on the two pins
DQ0 and DQ1.
The dummy bits can not be parallelized since these clock cycles are requested to perform
the internal reading operation.
DQ0
DQ1
S
C
Manufacturer identification (1 byte)
Device identification (2 bytes)
SPI
0
1
AFh
2
3
7
6
4
(RDID).
5
4
MAN.
code
5
3
2
6
1
0
Micron Technology, Inc., reserves the right to change products or specifications without notice.
7
7
6
8
5
DEV.
code
4
9 10 11 12 13 14 15
3
2
0
1
7
6
SIZE
code
5
4
3
2
1
0
©2010 Micron Technology, Inc. All rights reserved.
N25Q064 - 1.8V

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