PIC18F-LF1XK50 MICROCHIP [Microchip Technology], PIC18F-LF1XK50 Datasheet - Page 115

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PIC18F-LF1XK50

Manufacturer Part Number
PIC18F-LF1XK50
Description
20-Pin USB Flash Microcontrollers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
FIGURE 13-2:
13.2
Timer3 can be configured for 16-bit reads and writes
(see
T3CON register is set, the address for TMR3H is
mapped to a buffer register for the high byte of Timer3.
A read from TMR3L will load the contents of the high
byte of Timer3 into the Timer3 High Byte Buffer register.
This provides the user with the ability to accurately read
all 16 bits of Timer1 without having to determine
whether a read of the high byte, followed by a read of
the low byte, has become invalid due to a rollover
between reads.
A write to the high byte of Timer3 must also take place
through the TMR3H Buffer register. The Timer3 high
byte is updated with the contents of TMR3H when a
write occurs to TMR3L. This allows a user to write all
16 bits to both the high and low bytes of Timer3 at once.
The high byte of Timer3 is not directly readable or
writable in this mode. All reads and writes must take
place through the Timer3 High Byte Buffer register.
Writes to TMR3H do not clear the Timer3 prescaler.
The prescaler is only cleared on writes to TMR3L.
 2010 Microchip Technology Inc.
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
T13CKI/T1OSI
Figure
Timer3 16-Bit Read/Write Mode
T1OSO
13-2). When the RD16 control bit of the
CCP1 Select from T3CON<3>
CCP1 Special Event Trigger
Timer1 Oscillator
T1OSCEN
T3CKPS<1:0>
T3SYNC
TMR3ON
TIMER3 BLOCK DIAGRAM (16-BIT READ/WRITE MODE)
(1)
TMR3CS
Clock
F
Internal
OSC
/4
Preliminary
1
0
Timer1 Clock Input
Clear TMR3
Prescaler
1, 2, 4, 8
13.3
The Timer1 internal oscillator may be used as the clock
source for Timer3. The Timer1 oscillator is enabled by
setting the T1OSCEN bit of the T1CON register. To use
it as the Timer3 clock source, the TMR3CS bit must
also be set. As previously noted, this also configures
Timer3 to increment on every rising edge of the
oscillator source.
The Timer1 oscillator is described in
“Timer1
13.4
The TMR3 register pair (TMR3H:TMR3L) increments
from 0000h to FFFFh and overflows to 0000h. The
Timer3 interrupt, if enabled, is generated on overflow
and is latched in interrupt flag bit, TMR3IF of the PIR2
register. This interrupt can be enabled or disabled by
setting or clearing the Timer3 Interrupt Enable bit,
TMR3IE of the PIE2 register.
2
Using the Timer1 Oscillator as the
Timer3 Clock Source
Module”.
Timer3 Interrupt
TMR3L
PIC18F/LF1XK50
8
Sleep Input
8
Synchronize
Detect
High Byte
TMR3H
TMR3
8
8
8
Internal Data Bus
1
0
Read TMR1L
Write TMR1L
DS41350E-page 115
on Overflow
TMR3IF
Set
Section 11.0
Timer3
On/Off

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