PIC18F-LF1XK50 MICROCHIP [Microchip Technology], PIC18F-LF1XK50 Datasheet - Page 116

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PIC18F-LF1XK50

Manufacturer Part Number
PIC18F-LF1XK50
Description
20-Pin USB Flash Microcontrollers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
PIC18F/LF1XK50
13.5
If CCP1 module is configured to use Timer3 and to gen-
erate a Special Event Trigger in Compare mode
(CCP1M<3:0>), this signal will reset Timer3. It will also
start an A/D conversion if the A/D module is enabled
(see
information).
The module must be configured as either a timer or
synchronous counter to take advantage of this feature.
When used this way, the CCPR1H:CCPR1L register
pair effectively becomes a period register for Timer3.
If Timer3 is running in Asynchronous Counter mode,
the Reset operation may not work.
In the event that a write to Timer3 coincides with a
Special Event Trigger from a CCP module, the write will
take precedence.
TABLE 13-1:
DS41350E-page 116
INTCON
PIR2
PIE2
IPR2
TMR3L
TMR3H
T1CON
T3CON
TRISC
ANSELH
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Timer3 module.
Name
Section 17.2.8 “Special Event Trigger”
Resetting Timer3 Using the CCP
Special Event Trigger
Timer3 Register, Low Byte
Timer3 Register, High Byte
GIE/GIEH PEIE/GIEL TMR0IE
OSCFIE
OSCFIP
OSCFIF
TRISC7
RD16
RD16
Bit 7
REGISTERS ASSOCIATED WITH TIMER3 AS A TIMER/COUNTER
TRISC6
T1RUN
Bit 6
C1IF
C1IE
C1IP
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
T3CKPS1 T3CKPS0 T3CCP1
TRISC5
C2IE
C2IP
Bit 5
C2IF
for more
TRISC4
INT0IE
Preliminary
EEIF
EEIE
EEIP
Bit 4
TRISC3
ANS11
RABIE
BCLIF
BCLIE
BCLIP
Bit 3
T3SYNC
TMR0IF
TRISC2
ANS10
USBIF
USBIE
USBIP
Bit 2
TMR1CS TMR1ON
TMR3CS TMR3ON
TMR3IF
TMR3IE
TMR3IP
TRISC1
INT0IF
ANS9
Bit 1
 2010 Microchip Technology Inc.
CCP2IE
CCP2IP
CCP2IF
TRISC0
RABIF
ANS8
Bit 0
on page
Values
Reset
285
288
288
288
287
287
286
287
288
288

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