PIC18F-LF1XK50 MICROCHIP [Microchip Technology], PIC18F-LF1XK50 Datasheet - Page 31

• Manufacturer Part Number: PIC18F-LF1XK50
• Description: 20-Pin USB Flash Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

3.1.2.2
The STKPTR register
Pointer value, the STKFUL (stack full) bit and the
STKUNF (stack underflow) bits. The value of the Stack
Pointer can be 0 through 31. The Stack Pointer incre-
ments before values are pushed onto the stack and
decrements after values are popped off the stack. On
Reset, the Stack Pointer value will be zero. The user
may read and write the Stack Pointer value. This fea-
ture can be used by a Real-Time Operating System
(RTOS) for return stack maintenance.
After the PC is pushed onto the stack 31 times (without
popping any values off the stack), the STKFUL bit is
set. The STKFUL bit is cleared by software or by a
POR.
The action that takes place when the stack becomes
full depends on the state of the STVREN (Stack Over-
flow Reset Enable) Configuration bit. (Refer to
Section 24.1 “Configuration Bits”
the device Configuration bits.) If STVREN is set
(default), the 31st push will push the (PC + 2) value
onto the stack, set the STKFUL bit and reset the
device. The STKFUL bit will remain set and the Stack
Pointer will be set to zero.
If STVREN is cleared, the STKFUL bit will be set on the
31st push and the Stack Pointer will increment to 31.
Any additional pushes will not overwrite the 31st push
and STKPTR will remain at 31.
REGISTER 3-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4-0
Note 1:
STKFUL
R/C-0
(1)
Bit 7 and bit 6 are cleared by user software or by a POR.
Return Stack Pointer (STKPTR)
STKFUL: Stack Full Flag bit
1 = Stack became full or overflowed
0 = Stack has not become full or overflowed
STKUNF: Stack Underflow Flag bit
1 = Stack underflow occurred
0 = Stack underflow did not occur
Unimplemented: Read as ‘0’
SP<4:0>: Stack Pointer Location bits
STKUNF
R/C-0
(Register
STKPTR: STACK POINTER REGISTER
(1)
W = Writable bit
‘1’ = Bit is set
3-1) contains the Stack
U-0
for a description of
—
PIC18F1XK50/PIC18LF1XK50
(1)
R/W-0
SP4
Preliminary
(1)
U = Unimplemented
‘0’ = Bit is cleared
R/W-0
When the stack has been popped enough times to
unload the stack, the next pop will return a value of zero
to the PC and sets the STKUNF bit, while the Stack
Pointer remains at zero. The STKUNF bit will remain
set until cleared by software or until a POR occurs.
3.1.2.3
Since the Top-of-Stack is readable and writable, the
ability to push values onto the stack and pull values off
the stack without disturbing normal program execution
is a desirable feature. The PIC18 instruction set
includes two instructions, PUSH and POP, that permit
the TOS to be manipulated under software control.
TOSU, TOSH and TOSL can be modified to place data
or a return address on the stack.
The PUSH instruction places the current PC value onto
the stack. This increments the Stack Pointer and loads
the current PC value onto the stack.
The POP instruction discards the current TOS by decre-
menting the Stack Pointer. The previous value pushed
onto the stack then becomes the TOS value.
SP3
Note:
Returning a value of zero to the PC on an
underflow has the effect of vectoring the
program to the Reset vector, where the
stack conditions can be verified and
appropriate actions can be taken. This is
not the same as a Reset, as the contents
of the SFRs are not affected.
PUSH and POP Instructions
R/W-0
SP2
C = Clearable only bit
x = Bit is unknown
R/W-0
SP1
DS41350E-page 31
R/W-0
SP0
bit 0