PIC18F-LF1XK50 MICROCHIP [Microchip Technology], PIC18F-LF1XK50 Datasheet - Page 388

• Manufacturer Part Number: PIC18F-LF1XK50
• Description: 20-Pin USB Flash Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F/LF1XK50
FIGURE 27-12:
TABLE 27-9:
DS41350E-page 388
130
131
132
135
TBD
Legend: TBD = To Be Determined
Note 1:
Param
No.
Note 1:
2:
3:
4:
A/D DATA
SAMPLE
A/D CLK
T
T
T
T
T
ADRES
Symbol
AD
CNV
ACQ
SWC
BSF ADCON0, GO
DIS
ADIF
The time of the A/D clock period is dependent on the device frequency and the T
ADRES register may be read on the following T
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (V
.
On the following cycle of the device clock.
GO
2:
Q4
If the A/D clock source is selected as RC, a time of T
This allows the SLEEP instruction to be executed.
This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
A/D CONVERSION REQUIREMENTS
A/D Clock Period
Conversion Time
(not including acquisition time)
Acquisition Time
Switching Time from Convert  Sample
Discharge Time
132
A/D CONVERSION TIMING
(Note 2)
Characteristic
DD
(3)
9
to V
SS
8
or V
OLD_DATA
SS
(2)
7
Preliminary
to V
.. .
SAMPLING STOPPED
DD
CY
). The source impedance (R
CY
is added before the A/D clock starts.
cycle.
. . .
131
130
TBD
Min
0.7
0.7
1.4
0.2
11
—
2
(Note 4)
25.0
Max
12
—
—
—
1
(1)
1
Units
T
s
s
s
s
s
AD
S
 2010 Microchip Technology Inc.
) on the input channels is 50
0
T
A/D RC mode
-40C to +85C
0C  to  +85C
OSC
AD
based, V
clock divider.
NEW_DATA
DONE
Conditions
T
CY
REF
 3.0V