PIC18F-LF1XK50 MICROCHIP [Microchip Technology], PIC18F-LF1XK50 Datasheet - Page 97

• Manufacturer Part Number: PIC18F-LF1XK50
• Description: 20-Pin USB Flash Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

TABLE 9-14:
TABLE 9-5:
 2010 Microchip Technology Inc.
RC5/CCP1/P1A/
T0CKI
RC6/AN8/SS/
T13CKI/T1OSCI
RC7/AN9/SDO/
T1OSCO
Legend:
PORTC
LATC
TRISC
ANSEL
ANSELH
T1CON
T3CON
SSPCON1
CCP1CON
ECCP1AS
PSTRCON
SLRCON
REFCON1
INTCON
INTCON2
INTCON3
Name
Pin
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
I
2
C/SMB = I
ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1 PSSAC0 PSSBD1
GIE/GIEH PEIE/GIEL
TRISC7
RABPU
LATC7
INT2IP
WCOL
D1EN
ANS7
RD16
RD16
P1M1
Bit 7
RC7
PORTC I/O SUMMARY (CONTINUED)
SUMMARY OF REGISTERS ASSOCIATED WITH PORTC
Function
T1OSCO
—
—
—
T1OSCI
T13CKI
T0CKI
CCP1
SDO
RC5
RC6
AN8
RC7
AN9
P1A
SS
2
C/SMBus input buffer; x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
INTEDG0
TRISC6
SSPOV
T1RUN
D1LPS
INT1IP
LATC6
Setting
ANS6
P1M0
Bit 6
RC6
TRIS
—
—
—
—
0
1
0
1
0
1
0
1
1
1
1
x
0
1
1
0
x
I/O
O
O
O
O
O
O
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON
T3CKPS1 T3CKPS0
0
INTEDG1
I
I
I
I
I
I
I
I
I
I
DAC1OE
TMR0IE
TRISC5
SSPEN
DC1B1
LATC5
ANS5
Bit 5
RC5
—
—
—
—
Type
ANA
ANA
ANA
ANA
DIG
DIG
DIG
DIG
TTL
DIG
DIG
I/O
ST
ST
ST
ST
ST
ST
Preliminary
STRSYNC
INTEDG2
TRISC4
DC1B0
LATC4
INT0IE
INT2IE
ANS4
LATC<5> data output.
PORTC<5> data input.
ECCP1 compare or PWM output; takes priority over port data.
ECCP1 capture input.
ECCP1 Enhanced PWM output, channel A. May be configured for
tri-state during Enhanced PWM shutdown events. Takes priority over
port data
Timer0 counter input.
LATC<6> data output.
PORTC<6> data input.
A/D input channel 8.
Slave select input for SSP (MSSP module)
Timer1 and Timer3 counter input.
Timer1 oscillator input; enabled when Timer1 oscillator enabled.
Disables digital I/O.
LATC<7> data output.
PORTC<7> data input.
A/D input channel 9.
SPI data output (MSSP module); takes priority over port data.
Timer1 oscillator output; enabled when Timer1 oscillator enabled.
Disables digital I/O.
Bit 4
RC4
CKP
—
—
---
CCP1M3 CCP1M2 CCP1M1 CCP1M0
T3CCP1 T3SYNC TMR3CS TMR3ON
D1PSS1 D1PSS0
TRISC3
SSPM3
LATC3
ANS11
INT1IE
RABIE
STRD
ANS3
Bit 3
RC3
—
—
PIC18F/LF1XK50
TMR0IP
TRISC2
TMR0IF
SSPM2
ANS10
LATC2
STRC
SLRC
Bit 2
RC2
—
—
Description
TRISC1
SSPM1
LATC1
INT0IF
INT2IF
ANS9
STRB
SLRB
Bit 1
RC1
—
---
—
PSSBD0
TRISC0
SSPM0
D1NSS
LATC0
RABIF
RABIP
INT1IF
STRA
ANS8
SLRA
Bit 0
RC0
DS41350E-page 97
—
on page
Values
Reset
288
288
288
288
288
286
287
286
287
287
287
288
287
285
285
285