PIC18F-LF1XK50 MICROCHIP [Microchip Technology], PIC18F-LF1XK50 Datasheet - Page 84

• Manufacturer Part Number: PIC18F-LF1XK50
• Description: 20-Pin USB Flash Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F/LF1XK50
The interrupt-on-change feature is recommended for
wake-up on key depression operation and operations
where PORTA is only used for the interrupt-on-change
feature. Polling of PORTA is not recommended while
using the interrupt-on-change feature.
Each of the PORTA pins has an individually controlled
weak internal pull-up. When set, each bit of the WPUA
register enables the corresponding pin pull-up. When
cleared, the RABPU bit of the INTCON2 register
enables pull-ups on all pins which also have their cor-
responding WPUA bit set. When set, the RABPU bit
disables all weak pull-ups. The weak pull-up is auto-
matically turned off when the port pin is configured as
an output. The pull-ups are disabled on a Power-on
Reset.
RA0 and RA1 are multiplexed with the USB module
and can serve as the differential data lines for the on-
chip USB transceiver.
RA0 and RA1 do not have TRISA bits associated with
them. As digital port pins, they can only function as
digital inputs. When configured for USB operation, the
data direction is determined by the configuration and
status of the USB module at a given time.
RA3 is an input only pin. Its operation is controlled by
the MCLRE bit of the CONFIG3H register. When
selected as a port pin (MCLRE = 0), it functions as a
digital input only pin; as such, it does not have TRIS or
LAT bits associated with its operation.
DS41350E-page 84
Note:
Note:
Note 1: If a change on the I/O pin should occur
2: When configured for USB operation,
3: In order for the digital inputs to function
On a Power-on Reset, RA4 is configured
as analog inputs by default and read as
‘0’; RA<1:0> and RA<5:3> are configured
as digital inputs.
On a Power-on Reset, RA3 is enabled as
a digital input only if Master Clear
functionality is disabled.
when the read operation is being exe-
cuted (start of the Q2 cycle), then the
RABIF interrupt flag may not get set. Fur-
thermore, since a read or write on a port
affects all bits of that port, care must be
taken when using multiple pins in Inter-
rupt-on-change mode. Changes on one
pin may not be seen while servicing
changes on another pin.
interrupt-on-change functionality on RA0
and RA1 is automatically disabled.
on the RA<1:0> port pins, the interrupt-
on-change pins must be enabled (IOCA
<1:0> = 11) and the USB module must be
disabled (USBEN = 0).
Preliminary
Pins RA4 and RA5 are multiplexed with the main oscil-
lator pins; they are enabled as oscillator or I/O pins by
the selection of the main oscillator in the Configuration
register (see
details). When they are not used as port pins, RA4 and
RA5 and their associated TRIS and LAT bits read as
‘0’.
Pin RA4 is multiplexed with an analog input. The oper-
ation of pin RA4 as analog is selected by setting the
ANS3 bit in the ANSEL register which is the default set-
ting after a Power-on Reset.
EXAMPLE 9-1:
CLRF
CLRF
MOVLW
MOVWF
Note:
PORTA
LATA
030h
TRISA
On a Power-on Reset, RA4 is configured
as analog inputs and read as ‘0’.
Section 24.1 “Configuration Bits”
; Initialize PORTA by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RA<5:4> as output
INITIALIZING PORTA
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