PIC18F-LF1XK50 MICROCHIP [Microchip Technology], PIC18F-LF1XK50 Datasheet - Page 79

• Manufacturer Part Number: PIC18F-LF1XK50
• Description: 20-Pin USB Flash Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

7.8
The RCON register contains flag bits which are used to
determine the cause of the last Reset or wake-up from
Idle or Sleep modes. RCON also contains the IPEN bit
which enables interrupt priorities.
The operation of the SBOREN bit and the Reset flag
bits is discussed in more detail in
Register”.
REGISTER 7-10:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-0
IPEN
2:
3:
RCON Register
If SBOREN is enabled, its Reset state is ‘1’; otherwise, it is ‘0’.
The actual Reset value of POR is determined by the type of device Reset. See the notes following this
register and
See
Table
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
SBOREN: BOR Software Enable bit
If BOREN<1:0> = 01:
1 = BOR is enabled
0 = BOR is disabled
If BOREN<1:0> = 00, 10 or 11:
Bit is disabled and read as ‘0’.
Unimplemented: Read as ‘0’
RI: RESET Instruction Flag bit
1 = The RESET instruction was not executed (set by firmware or Power-on Reset)
0 = The RESET instruction was executed causing a device Reset (must be set in firmware after a
TO: Watchdog Time-out Flag bit
1 = Set by power-up, CLRWDT instruction or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down Detection Flag bit
1 = Set by power-up or by the CLRWDT instruction
0 = Set by execution of the SLEEP instruction
POR: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit
1 = A Brown-out Reset has not occurred (set by firmware only)
0 = A Brown-out Reset occurred (must be set by firmware after a POR or Brown-out Reset occurs)
SBOREN
R/W-1
code-executed Reset occurs)
23-3.
RCON: RESET CONTROL REGISTER
Section 23.6 “Reset State of Registers”
(1)
W = Writable bit
‘1’ = Bit is set
Section 23.1 “RCON
U-0
—
R/W-1
(2)
(3)
Preliminary
RI
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-1
TO
for additional information.
PIC18F/LF1XK50
R-1
PD
x = Bit is unknown
POR
R/W-0
(2)
DS41350E-page 79
R/W-0
BOR
bit 0