PIC18F-LF1XK50 MICROCHIP [Microchip Technology], PIC18F-LF1XK50 Datasheet - Page 409

• Manufacturer Part Number: PIC18F-LF1XK50
• Description: 20-Pin USB Flash Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

DC Characteristics
DCFSNZ .......................................................................... 329
DECF ............................................................................... 328
DECFSZ ........................................................................... 329
Development Support ...................................................... 359
Device Differences ........................................................... 406
Device Overview .................................................................. 9
Device Reset Timers ........................................................ 281
DEVID1 Register .............................................................. 301
DEVID2 Register .............................................................. 301
Direct Addressing ............................................................... 47
E
ECCPAS Register ............................................................ 129
EECON1 Register ........................................................ 53, 62
Effect on Standard PIC Instructions ................................. 356
Electrical Specifications ................................................... 363
Enhanced Capture/Compare/PWM (ECCP) .................... 117
Enhanced Universal Synchronous Asynchronous Receiver
Equations
Errata ................................................................................... 7
EUSART .......................................................................... 181
 2010 Microchip Technology Inc.
Graphs and Tables .................................................. 397
Extended and Industrial ........................................... 374
Industrial and Extended ........................................... 364
Details on Individual Family Members ....................... 10
Features (28-Pin Devices) ......................................... 11
New Core Features ...................................................... 9
Other Special Features .............................................. 10
Oscillator Start-up Timer (OST) ............................... 281
PLL Lock Time-out ................................................... 281
Power-up Timer (PWRT) ......................................... 281
Time-out Sequence .................................................. 281
Associated Registers ............................................... 138
Enhanced PWM Mode ............................................. 121
Outputs and Configuration ....................................... 118
Specifications ........................................................... 387
Transmitter (EUSART) ............................................. 181
Estimating USB Transceiver Current Consumption . 273
Asynchronous Mode ................................................ 183
Baud Rate Generator (BRG)
Auto-Restart ..................................................... 131
Auto-shutdown ................................................. 129
Direction Change in Full-Bridge Output Mode . 127
Full-Bridge Application ..................................... 125
Full-Bridge Mode ............................................. 125
Half-Bridge Application .................................... 124
Half-Bridge Application Examples ................... 132
Half-Bridge Mode ............................................. 124
Output Relationships (Active-High and Active-Low)
Output Relationships Diagram ......................... 123
Programmable Dead Band Delay .................... 132
Shoot-through Current ..................................... 132
Start-up Considerations ................................... 128
12-bit Break Transmit and Receive ................. 200
Associated Registers, Receive ........................ 189
Associated Registers, Transmit ....................... 185
Auto-Wake-up on Break .................................. 198
Baud Rate Generator (BRG) ........................... 193
Clock Accuracy ................................................ 190
Receiver ........................................................... 186
Setting up 9-bit Mode with Address Detect ...... 188
Transmitter ....................................................... 183
Associated Registers ....................................... 193
Auto Baud Rate Detect .................................... 197
.................................................................. 122
Preliminary
Extended Instruction Set
F
Fail-Safe Clock Monitor ............................................. 26, 291
Fast Register Stack ........................................................... 32
Firmware Instructions ...................................................... 309
Flash Program Memory ..................................................... 51
G
General Call Address Support ......................................... 164
GOTO .............................................................................. 330
Clock polarity
Data polarity
Interrupts
Synchronous Master Mode .............................. 201, 205
Synchronous Slave Mode
ADDFSR .................................................................. 352
ADDULNK ............................................................... 352
and Using MPLAB Tools ......................................... 358
CALLW .................................................................... 353
Considerations for Use ............................................ 356
MOVSF .................................................................... 353
MOVSS .................................................................... 354
PUSHL ..................................................................... 354
SUBFSR .................................................................. 355
SUBULNK ................................................................ 355
Syntax ...................................................................... 351
Fail-Safe Condition Clearing ...................................... 27
Fail-Safe Detection .................................................... 26
Fail-Safe Operation ................................................... 26
Reset or Wake-up from Sleep ................................... 27
Associated Registers ................................................. 59
Control Registers ....................................................... 52
Erase Sequence ........................................................ 56
Erasing ...................................................................... 56
Operation During Code-Protect ................................. 59
Reading ..................................................................... 55
Table Pointer
Table Pointer Boundaries .......................................... 54
Table Reads and Table Writes .................................. 51
Write Sequence ......................................................... 57
Writing To .................................................................. 57
Baud Rate Error, Calculating ........................... 193
Baud Rates, Asynchronous Modes ................. 194
Formulas .......................................................... 193
High Baud Rate Select (BRGH Bit) ................. 193
Synchronous Mode .......................................... 201
Asynchronous Receive .................................... 186
Asynchronous Transmit ................................... 183
Synchronous Mode .......................................... 201
Asynchronous Receive .................................... 187
Asynchronous Transmit ................................... 184
Associated Registers, Receive ........................ 205
Associated Registers, Transmit ............... 203, 206
Reception ........................................................ 203
Transmission ................................................... 201
Associated Registers, Receive ........................ 207
Reception ........................................................ 206
Transmission ................................................... 205
EECON1 and EECON2 ..................................... 52
TABLAT (Table Latch) Register ........................ 54
TBLPTR (Table Pointer) Register ...................... 54
Boundaries Based on Operation ....................... 54
Protection Against Spurious Writes ................... 59
Unexpected Termination ................................... 59
Write Verify ........................................................ 59
PIC18F/LF1XK50
DS41350E-page 409