AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 108

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

Device Operations
Flash Read Command
Flash Write Command
108
AT91SAM7S32 Preliminary
Several commands on the Flash memory are available. These commands are summarized in
Table 21 on page 105. Each command is driven by the programmer through the parallel inter-
face running several read/write handshaking sequences.
When a new command is executed, the previous one is automatically achieved. Thus, chain-
ing a read command after a write automatically flushes the load buffer in the Flash.
This command is used to read the contents of the Flash memory. The read command can start
at any valid address in the memory plane and is optimized for consecutive reads. Read hand-
shaking can be chained; an internal address buffer is automatically increased.
Table 24. Read Command
This command is used to write the Flash contents.
The Flash memory plane is organized into several pages. Data to be written are stored in a
load buffer that corresponds to a Flash memory page. The load buffer is automatically flushed
to the Flash:
•
•
The Write Page command (WP) is optimized for consecutive writes. Write handshaking can
be chained; an internal address buffer is automatically increased.
Table 25. Write Command
Step
1
2
3
4
5
6
7
...
n
n+1
n+2
n+3
n+4
n+5
...
Step
1
2
3
4
before access to any page other than the current one
when a new command is validated (MODE = CMDE)
Handshake Sequence
Write handshaking
Write handshaking
Write handshaking
Write handshaking
Write handshaking
Read handshaking
Read handshaking
...
Write handshaking
Write handshaking
Write handshaking
Write handshaking
...
Handshake Sequence
Write handshaking
Write handshaking
Write handshaking
Write handshaking
Read handshaking
Read handshaking
MODE[3:0]
CMDE
ADDR0
ADDR1
ADDR2
MODE[3:0]
CMDE
ADDR0
ADDR1
ADDR2
ADDR3
DATA
DATA
...
ADDR0
ADDR1
ADDR2
ADDR3
DATA
DATA
...
DATA[7:0]
WP or WPL or EWP or EWPL
32-bit Memory Address First byte
32-bit Flash Address
32-bit Flash Address
DATA[7:0]
READ
32-bit Memory Address First byte
32-bit Flash Address
32-bit Flash Address
32-bit Flash Address Last Byte
*Memory Address++
*Memory Address++
...
32-bit Memory Address First byte
32-bit Flash Address
32-bit Flash Address
32-bit Flash Address Last Byte
*Memory Address++
*Memory Address++
...
6071A–ATARM–28-Oct-04