AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 288
AT91SAM7S32-AI
Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT91SAM7S32-AI.pdf
(446 pages)
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RS485 Mode
288
AT91SAM7S32 Preliminary
The USART features the RS485 mode to enable line driver control. While operating in RS485
mode, the USART behaves as though in asynchronous or synchronous mode and configura-
tion of all the parameters is possible. The difference is that the RTS pin is driven high when the
transmitter is operating. The behavior of the RTS pin is controlled by the TXEMPTY bit. A typ-
ical connection of the USART to a RS485 bus is shown in Figure 124.
Figure 124. Typical Connection to a RS485 Bus
The USART is set in RS485 mode by programming the USART_MODE field in the Mode Reg-
ister (US_MR) to the value 0x1.
The RTS pin is at a level inverse to the TXEMPTY bit. Significantly, the RTS pin remains high
when a timeguard is programmed so that the line can remain driven after the last character
completion. Figure 125 gives an example of the RTS waveform during a character transmis-
sion when the timeguard is enabled.
Figure 125. Example of RTS Drive with Timeguard
Baud Rate
TXEMPTY
US_THR
TXRDY
Clock
Write
TXD
RTS
USART
Start
Bit
D0
RXD
TXD
RTS
D1
D2
D3
D4
D5
D6
D7
Parity
Bit
Stop
Bit
Differential
TG = 4
Bus
6071A–ATARM–28-Oct-04
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