AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 117

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

Peripheral Data Controller (PDC)
Overview
Block Diagram
6071A–ATARM–28-Oct-04
The Peripheral Data Controller (PDC) transfers data between on-chip serial peripherals such
as the UART, USART, SSC, SPI, MCI and the on- and off-chip memories. Using the Periph-
eral Data Contoller avoids processor intervention and removes the processor interrupt-
handling overhead. This significantly reduces the number of clock cycles required for a data
transfer and, as a result, improves the performance of the microcontroller and makes it more
power efficient.
The PDC channels are implemented in pairs, each pair being dedicated to a particular periph-
eral. One channel in the pair is dedicated to the receiving channel and one to the transmitting
channel of each UART, USART, SSC and SPI.
The user interface of a PDC channel is integrated in the memory space of each peripheral. It
contains:
•
•
•
•
The peripheral triggers PDC transfers using transmit and receive signals. When the pro-
grammed data is transferred, an end of transfer interrupt is generated by the corresponding
peripheral.
Figure 42. Block Diagram
A 32-bit memory pointer register
A 16-bit transfer count register
A 32-bit register for next memory pointer
A 16-bit register for next transfer count
Peripheral
Control
THR
RHR
Status & Control
PDC Channel 0
PDC Channel 1
Peripheral Data Controller
AT91SAM7S32 Preliminary
Control
Controller
Memory
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