AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 369

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

Pulse Width Modulation Controller (PWM)
Overview
Block Diagram
6071A–ATARM–28-Oct-04
The PWM macrocell controls several channels independently. Each channel controls one
square output waveform. Characteristics of the output waveform such as period, duty-cycle
and polarity are configurable through the user interface. Each channel selects and uses one of
the clocks provided by the clock generator. The clock generator provides several clocks result-
ing from the division of the PWM macrocell master clock.
All PWM macrocell accesses are made through APB mapped registers.
Channels can be synchronized, to generate non overlapped waveforms. All channels integrate
a double buffering system in order to prevent an unexpected output waveform while modifying
the period or the duty-cycle.
Figure 161. Pulse Width Modulation Controller Block Diagram
PMC
MCK
Clock Generator
Channel
Channel
Selector
Selector
PWMx
PWM0
Clock
Clock
APB Interface
AT91SAM7S32 Preliminary
Controller
PWM
Duty Cycle
Duty Cycle
Counter
Counter
Update
Update
Period
Period
APB
Comparator
Comparator
Interrupt Generator
PIO
AIC
PWMx
PWMx
PWM0
PWM0
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