AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 390
AT91SAM7S32-AI
Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT91SAM7S32-AI.pdf
(446 pages)
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Signal Description
Table 80. ADC Pin Description
Product Dependencies
Power
Management
Interrupt Sources
Analog Inputs
I/O Lines
Timer Triggers
Conversion
Performances
390
Pin Name
VDDIN
ADVREF
AD0 - AD7
ADTRG
AT91SAM7S32 Preliminary
The ADC is automatically clocked after the first conversion in Normal Mode. In Sleep Mode,
the ADC clock is automatically stopped after each conversion. As the logic is small and the
ADC cell can be put into Sleep Mode, the Power Management Controller has no effect on the
ADC behavior.
The ADC interrupt line is connected on one of the internal sources of the Advanced Interrupt
Controller. Using the ADC interrupt requires the AIC to be programmed first.
The pins AD0 to AD7 can be multiplexed with PIO lines. In this case, the assignment of the
ADC input is automatically done as soon as the corresponding channel is enabled by writing
the register ADC_CHER. By default, after reset, the PIO line is configured as input with its pull-
up enabled and the ADC input is connected to the GND.
The pin ADTRG may be shared with other peripheral functions through the PIO Controller. In
this case, the PIO Controller should be set accordingly to assign the pin ADTRG to the ADC
function.
Timer Counters may or may not be used as hardware triggers depending on user require-
ments. Thus, some or all of the timer counters may be non-connected.
For performance and electrical characteristics of the ADC, see the DC Characteristics section.
Description
Analog power supply
Reference voltage
Analog input channels
External trigger
6071A–ATARM–28-Oct-04
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