AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 179

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AT91SAM7S32-AI

Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Figure 72. Transmitter Control
Peripheral Data
Controller
Test Modes
6071A–ATARM–28-Oct-04
Shift Register
DBGU_THR
TXEMPTY
TXRDY
DTXD
in DBGU_THR
Write Data 0
S
Data 0
in DBGU_THR
Write Data 1
Both the receiver and the transmitter of the Debug Unit's UART are generally connected to a
Peripheral Data Controller (PDC) channel.
The peripheral data controller channels are programmed via registers that are mapped within
the Debug Unit user interface from the offset 0x100. The status bits are reported in the Debug
Unit status register DBGU_SR and can generate an interrupt.
The RXRDY bit triggers the PDC channel data transfer of the receiver. This results in a read of
the data in DBGU_RHR. The TXRDY bit triggers the PDC channel data transfer of the trans-
mitter. This results in a write of a data in DBGU_THR.
The Debug Unit supports three tests modes. These modes of operation are programmed by
using the field CHMODE (Channel Mode) in the mode register DBGU_MR.
The Automatic Echo mode allows bit-by-bit retransmission. When a bit is received on the
DRXD line, it is sent to the DTXD line. The transmitter operates normally, but has no effect on
the DTXD line.
The Local Loopback mode allows the transmitted characters to be received. DTXD and DRXD
pins are not used and the output of the transmitter is internally connected to the input of the
receiver. The DRXD pin level has no effect and the DTXD line is held high, as in idle state.
The Remote Loopback mode directly connects the DRXD pin to the DTXD line. The transmit-
ter and the receiver are disabled and have no effect. This mode allows a bit-by-bit
retransmission.
Data 0
Data 0
P
stop
S
AT91SAM7S32 Preliminary
Data 1
Data 1
P
Data 1
stop
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